diff mbox series

[2/3] clk: qcom: apss-ipq-pll: add support for IPQ5018

Message ID 20230829095423.760641-3-quic_gokulsri@quicinc.com (mailing list archive)
State Superseded
Headers show
Series Add APSS clock driver support for IPQ5018 | expand

Commit Message

Gokul Sriram Palanisamy Aug. 29, 2023, 9:54 a.m. UTC
IPQ5018 APSS PLL is of type Stromer. Add support for Stromer PLL,
configuration values and the compatible.

Co-developed-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
---
 drivers/clk/qcom/apss-ipq-pll.c | 52 ++++++++++++++++++++++++++++++++-
 1 file changed, 51 insertions(+), 1 deletion(-)

Comments

Stephen Boyd Aug. 29, 2023, 10:34 p.m. UTC | #1
Quoting Gokul Sriram Palanisamy (2023-08-29 02:54:22)
> diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
> index e170331858cc..bbc25d5eb70d 100644
> --- a/drivers/clk/qcom/apss-ipq-pll.c
> +++ b/drivers/clk/qcom/apss-ipq-pll.c
> @@ -24,6 +24,17 @@ static const u8 ipq_pll_offsets[][PLL_OFF_MAX_REGS] = {
>                 [PLL_OFF_TEST_CTL] = 0x30,
>                 [PLL_OFF_TEST_CTL_U] = 0x34,
>         },
> +       [CLK_ALPHA_PLL_TYPE_STROMER] = {
> +               [PLL_OFF_L_VAL] = 0x08,
> +               [PLL_OFF_ALPHA_VAL] = 0x10,
> +               [PLL_OFF_ALPHA_VAL_U] = 0x14,
> +               [PLL_OFF_USER_CTL] = 0x18,
> +               [PLL_OFF_USER_CTL_U] = 0x1c,
> +               [PLL_OFF_CONFIG_CTL] = 0x20,
> +               [PLL_OFF_STATUS] = 0x28,
> +               [PLL_OFF_TEST_CTL] = 0x30,
> +               [PLL_OFF_TEST_CTL_U] = 0x34,
> +       },

Is anything different from STROMER_PLUS?

>         [CLK_ALPHA_PLL_TYPE_STROMER_PLUS] = {
>                 [PLL_OFF_L_VAL] = 0x08,
>                 [PLL_OFF_ALPHA_VAL] = 0x10,
> @@ -73,6 +84,38 @@ static struct clk_alpha_pll ipq_pll_stromer_plus = {
>         },
>  };
>  
> +static struct clk_alpha_pll ipq_pll_stromer = {
> +       .offset = 0x0,
> +       .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER],
> +       .flags = SUPPORTS_DYNAMIC_UPDATE,
> +       .clkr = {
> +               .enable_reg = 0x0,
> +               .enable_mask = BIT(0),
> +               .hw.init = &(struct clk_init_data){

const?

> +                       .name = "a53pll",
> +                       .parent_data = &(const struct clk_parent_data) {
> +                               .fw_name = "xo",
> +                       },
> +                       .num_parents = 1,
> +                       .ops = &clk_alpha_pll_stromer_ops,
> +               },
> +       },
> +};
> +
> +static const struct alpha_pll_config ipq5018_pll_config = {
> +       .l = 0x32,
> +       .config_ctl_val = 0x4001075b,
> +       .config_ctl_hi_val = 0x304,
> +       .main_output_mask = BIT(0),
> +       .aux_output_mask = BIT(1),
> +       .early_output_mask = BIT(3),
> +       .alpha_en_mask = BIT(24),
> +       .status_val = 0x3,
> +       .status_mask = GENMASK(10, 8),
> +       .lock_det = BIT(2),
> +       .test_ctl_hi_val = 0x00400003,
> +};
> +
>  static const struct alpha_pll_config ipq5332_pll_config = {
>         .l = 0x3e,
>         .config_ctl_val = 0x4001075b,
> @@ -129,6 +172,12 @@ struct apss_pll_data {
>         const struct alpha_pll_config *pll_config;
>  };
>  
> +static struct apss_pll_data ipq5018_pll_data = {

const?

> +       .pll_type = CLK_ALPHA_PLL_TYPE_STROMER,
> +       .pll = &ipq_pll_stromer,
> +       .pll_config = &ipq5018_pll_config,
> +};
> +
>  static struct apss_pll_data ipq5332_pll_data = {
>         .pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
>         .pll = &ipq_pll_stromer_plus,
> @@ -183,7 +232,7 @@ static int apss_ipq_pll_probe(struct platform_device *pdev)
>  
>         if (data->pll_type == CLK_ALPHA_PLL_TYPE_HUAYRA)
>                 clk_alpha_pll_configure(data->pll, regmap, data->pll_config);
> -       else if (data->pll_type == CLK_ALPHA_PLL_TYPE_STROMER_PLUS)
> +       else

Just add both STROMER and STROMER_PLUS. Or make STROMER the same as
STROMER_PLUS locally in this file?

>                 clk_stromer_pll_configure(data->pll, regmap, data->pll_config);
>  
>         ret = devm_clk_register_regmap(dev, &data->pll->clkr);
Gokul Sriram Palanisamy Aug. 30, 2023, 6:37 a.m. UTC | #2
On 8/30/2023 4:04 AM, Stephen Boyd wrote:
> Quoting Gokul Sriram Palanisamy (2023-08-29 02:54:22)
>> diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
>> index e170331858cc..bbc25d5eb70d 100644
>> --- a/drivers/clk/qcom/apss-ipq-pll.c
>> +++ b/drivers/clk/qcom/apss-ipq-pll.c
>> @@ -24,6 +24,17 @@ static const u8 ipq_pll_offsets[][PLL_OFF_MAX_REGS] = {
>>                  [PLL_OFF_TEST_CTL] = 0x30,
>>                  [PLL_OFF_TEST_CTL_U] = 0x34,
>>          },
>> +       [CLK_ALPHA_PLL_TYPE_STROMER] = {
>> +               [PLL_OFF_L_VAL] = 0x08,
>> +               [PLL_OFF_ALPHA_VAL] = 0x10,
>> +               [PLL_OFF_ALPHA_VAL_U] = 0x14,
>> +               [PLL_OFF_USER_CTL] = 0x18,
>> +               [PLL_OFF_USER_CTL_U] = 0x1c,
>> +               [PLL_OFF_CONFIG_CTL] = 0x20,
>> +               [PLL_OFF_STATUS] = 0x28,
>> +               [PLL_OFF_TEST_CTL] = 0x30,
>> +               [PLL_OFF_TEST_CTL_U] = 0x34,
>> +       },
> Is anything different from STROMER_PLUS?
  No, here both both STROMER and STROMER  PLUS has the same offsets.
   Will update to reuse STORMER PLUS config.
>>          [CLK_ALPHA_PLL_TYPE_STROMER_PLUS] = {
>>                  [PLL_OFF_L_VAL] = 0x08,
>>                  [PLL_OFF_ALPHA_VAL] = 0x10,
>> @@ -73,6 +84,38 @@ static struct clk_alpha_pll ipq_pll_stromer_plus = {
>>          },
>>   };
>>   
>> +static struct clk_alpha_pll ipq_pll_stromer = {
>> +       .offset = 0x0,
>> +       .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER],
>> +       .flags = SUPPORTS_DYNAMIC_UPDATE,
>> +       .clkr = {
>> +               .enable_reg = 0x0,
>> +               .enable_mask = BIT(0),
>> +               .hw.init = &(struct clk_init_data){
> const?
  sure, will update.
>> +                       .name = "a53pll",
>> +                       .parent_data = &(const struct clk_parent_data) {
>> +                               .fw_name = "xo",
>> +                       },
>> +                       .num_parents = 1,
>> +                       .ops = &clk_alpha_pll_stromer_ops,
>> +               },
>> +       },
>> +};
>> +
>> +static const struct alpha_pll_config ipq5018_pll_config = {
>> +       .l = 0x32,
>> +       .config_ctl_val = 0x4001075b,
>> +       .config_ctl_hi_val = 0x304,
>> +       .main_output_mask = BIT(0),
>> +       .aux_output_mask = BIT(1),
>> +       .early_output_mask = BIT(3),
>> +       .alpha_en_mask = BIT(24),
>> +       .status_val = 0x3,
>> +       .status_mask = GENMASK(10, 8),
>> +       .lock_det = BIT(2),
>> +       .test_ctl_hi_val = 0x00400003,
>> +};
>> +
>>   static const struct alpha_pll_config ipq5332_pll_config = {
>>          .l = 0x3e,
>>          .config_ctl_val = 0x4001075b,
>> @@ -129,6 +172,12 @@ struct apss_pll_data {
>>          const struct alpha_pll_config *pll_config;
>>   };
>>   
>> +static struct apss_pll_data ipq5018_pll_data = {
> const?
  sure, will update.
>> +       .pll_type = CLK_ALPHA_PLL_TYPE_STROMER,
>> +       .pll = &ipq_pll_stromer,
>> +       .pll_config = &ipq5018_pll_config,
>> +};
>> +
>>   static struct apss_pll_data ipq5332_pll_data = {
>>          .pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
>>          .pll = &ipq_pll_stromer_plus,
>> @@ -183,7 +232,7 @@ static int apss_ipq_pll_probe(struct platform_device *pdev)
>>   
>>          if (data->pll_type == CLK_ALPHA_PLL_TYPE_HUAYRA)
>>                  clk_alpha_pll_configure(data->pll, regmap, data->pll_config);
>> -       else if (data->pll_type == CLK_ALPHA_PLL_TYPE_STROMER_PLUS)
>> +       else
> Just add both STROMER and STROMER_PLUS. Or make STROMER the same as
> STROMER_PLUS locally in this file?

sure, with the first comment addressed, this change will not be needed.

Regards,
Gokul
diff mbox series

Patch

diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index e170331858cc..bbc25d5eb70d 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -24,6 +24,17 @@  static const u8 ipq_pll_offsets[][PLL_OFF_MAX_REGS] = {
 		[PLL_OFF_TEST_CTL] = 0x30,
 		[PLL_OFF_TEST_CTL_U] = 0x34,
 	},
+	[CLK_ALPHA_PLL_TYPE_STROMER] = {
+		[PLL_OFF_L_VAL] = 0x08,
+		[PLL_OFF_ALPHA_VAL] = 0x10,
+		[PLL_OFF_ALPHA_VAL_U] = 0x14,
+		[PLL_OFF_USER_CTL] = 0x18,
+		[PLL_OFF_USER_CTL_U] = 0x1c,
+		[PLL_OFF_CONFIG_CTL] = 0x20,
+		[PLL_OFF_STATUS] = 0x28,
+		[PLL_OFF_TEST_CTL] = 0x30,
+		[PLL_OFF_TEST_CTL_U] = 0x34,
+	},
 	[CLK_ALPHA_PLL_TYPE_STROMER_PLUS] = {
 		[PLL_OFF_L_VAL] = 0x08,
 		[PLL_OFF_ALPHA_VAL] = 0x10,
@@ -73,6 +84,38 @@  static struct clk_alpha_pll ipq_pll_stromer_plus = {
 	},
 };
 
+static struct clk_alpha_pll ipq_pll_stromer = {
+	.offset = 0x0,
+	.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER],
+	.flags = SUPPORTS_DYNAMIC_UPDATE,
+	.clkr = {
+		.enable_reg = 0x0,
+		.enable_mask = BIT(0),
+		.hw.init = &(struct clk_init_data){
+			.name = "a53pll",
+			.parent_data = &(const struct clk_parent_data) {
+				.fw_name = "xo",
+			},
+			.num_parents = 1,
+			.ops = &clk_alpha_pll_stromer_ops,
+		},
+	},
+};
+
+static const struct alpha_pll_config ipq5018_pll_config = {
+	.l = 0x32,
+	.config_ctl_val = 0x4001075b,
+	.config_ctl_hi_val = 0x304,
+	.main_output_mask = BIT(0),
+	.aux_output_mask = BIT(1),
+	.early_output_mask = BIT(3),
+	.alpha_en_mask = BIT(24),
+	.status_val = 0x3,
+	.status_mask = GENMASK(10, 8),
+	.lock_det = BIT(2),
+	.test_ctl_hi_val = 0x00400003,
+};
+
 static const struct alpha_pll_config ipq5332_pll_config = {
 	.l = 0x3e,
 	.config_ctl_val = 0x4001075b,
@@ -129,6 +172,12 @@  struct apss_pll_data {
 	const struct alpha_pll_config *pll_config;
 };
 
+static struct apss_pll_data ipq5018_pll_data = {
+	.pll_type = CLK_ALPHA_PLL_TYPE_STROMER,
+	.pll = &ipq_pll_stromer,
+	.pll_config = &ipq5018_pll_config,
+};
+
 static struct apss_pll_data ipq5332_pll_data = {
 	.pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
 	.pll = &ipq_pll_stromer_plus,
@@ -183,7 +232,7 @@  static int apss_ipq_pll_probe(struct platform_device *pdev)
 
 	if (data->pll_type == CLK_ALPHA_PLL_TYPE_HUAYRA)
 		clk_alpha_pll_configure(data->pll, regmap, data->pll_config);
-	else if (data->pll_type == CLK_ALPHA_PLL_TYPE_STROMER_PLUS)
+	else
 		clk_stromer_pll_configure(data->pll, regmap, data->pll_config);
 
 	ret = devm_clk_register_regmap(dev, &data->pll->clkr);
@@ -195,6 +244,7 @@  static int apss_ipq_pll_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id apss_ipq_pll_match_table[] = {
+	{ .compatible = "qcom,ipq5018-a53pll", .data = &ipq5018_pll_data },
 	{ .compatible = "qcom,ipq5332-a53pll", .data = &ipq5332_pll_data },
 	{ .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_data },
 	{ .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_data },