From patchwork Fri Sep 1 12:44:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 13372516 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 374F4CA0FEF for ; Fri, 1 Sep 2023 12:44:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349578AbjIAMon (ORCPT ); Fri, 1 Sep 2023 08:44:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44724 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242569AbjIAMoi (ORCPT ); Fri, 1 Sep 2023 08:44:38 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2DC410D3; Fri, 1 Sep 2023 05:44:33 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4d01:31d2:de6b:d217]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3567366072E6; Fri, 1 Sep 2023 13:44:32 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1693572272; bh=PWkYPK7UJF1YmVd+lrdWvCWfZPTYmEC52Q6H6L/2CpY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S49BGjOcGyaMdIwRpWlHOylZ/QWpiVcWA3aOPwoNOF8CVnvLzUH2lT5g2Y6981dNH KBKvr+pzhlbF/6YLUTvqsT0SLe4t95waFeUEghNtOWICOZ3n0a2Q4lwlUriGKq1o0M 6xIYV2jnCavBA9AAC/+mu4SdOtViJ/D2MNO8izvAflP4Xi9L+TbdfvtY1aHOStH6dr kVAfnPbwDXXaB1cFMqZlwtJ7Pc8UeY9GyE4HTTiZqS3LkdRhgDC5PfqPYUNt0fE76T NzoZ/CudgTKeS865Ykjelf+L11Q2vAsoEmh7cwWc5BBTSHBnJsgLKdDa94zNOsbj6d jPP//HsNTEeiQ== From: Benjamin Gaignard To: mchehab@kernel.org, tfiga@chromium.org, m.szyprowski@samsung.com, ming.qian@nxp.com, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v6 14/18] media: verisilicon: vp9: Use destination buffer height to compute chroma offset Date: Fri, 1 Sep 2023 14:44:10 +0200 Message-Id: <20230901124414.48497-15-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230901124414.48497-1-benjamin.gaignard@collabora.com> References: <20230901124414.48497-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Source and destination buffer height may not be the same because alignment constraint are different. Use destination height to compute chroma offset because we target this buffer as hardware output. Signed-off-by: Benjamin Gaignard Fixes: e2da465455ce ("media: hantro: Support VP9 on the G2 core") --- drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c index 6db1c32fce4d..1f3f5e7ce978 100644 --- a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c +++ b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c @@ -93,9 +93,7 @@ static int start_prepare_run(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_ static size_t chroma_offset(const struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) { - int bytes_per_pixel = dec_params->bit_depth == 8 ? 1 : 2; - - return ctx->src_fmt.width * ctx->src_fmt.height * bytes_per_pixel; + return ctx->dst_fmt.width * ctx->dst_fmt.height * ctx->bit_depth / 8; } static size_t mv_offset(const struct hantro_ctx *ctx,