[v2] arm64: dts: qcom: sc7280: Add ports subnodes in usb/dp qmpphy node

Commit Message

Luca Weiss Sept. 29, 2023, 12:51 p.m. UTC

Add the USB3+DP Combo QMP PHY port subnodes to facilitate the
description of the connection between the hardware blocks.

Put it in the SoC DTSI to avoid duplication in the device DTs.

Reviewed-by: Konrad Dybcio <[e-mail]>
Signed-off-by: Luca Weiss <[e-mail]>
---
Changes in v2:
- Update commit message after feedback from Konrad
- Pick up tags
- Link to v1: https://lore.kernel.org/r/[e-mail]
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)


---
base-commit: df964ce9ef9fea10cf131bf6bad8658fde7956f6
change-id: 20230929-sc7280-qmpphy-ports-20afd4212470

Best regards,

Comments

Bjorn Andersson Oct. 16, 2023, 6:25 p.m. UTC | #1

On Fri, 29 Sep 2023 14:51:22 +0200, Luca Weiss wrote:
> Add the USB3+DP Combo QMP PHY port subnodes to facilitate the
> description of the connection between the hardware blocks.
> 
> Put it in the SoC DTSI to avoid duplication in the device DTs.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sc7280: Add ports subnodes in usb/dp qmpphy node
      commit: 2278b16f12a9cc33b95a980e05d4d8f3f8e0abfa

Best regards,

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 66f1eb83cca7..4e34d00e246b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3399,6 +3399,32 @@  usb_1_qmpphy: phy@88e8000 {
 
 			#clock-cells = <1>;
 			#phy-cells = <1>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					usb_dp_qmpphy_out: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+
+					usb_dp_qmpphy_usb_ss_in: endpoint {
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+
+					usb_dp_qmpphy_dp_in: endpoint {
+					};
+				};
+			};
 		};
 
 		usb_2: usb@8cf8800 {