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[v2,1/2] dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocks

Message ID 20230930103316.234103-1-robimarko@gmail.com (mailing list archive)
State Superseded
Headers show
Series [v2,1/2] dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocks | expand

Commit Message

Robert Marko Sept. 30, 2023, 10:32 a.m. UTC
Allow passing QMP PCI PHY PIPE clocks to the IPQ8074 GCC to avoid having
to do a global matching by name.

Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Krzysztof Kozlowski Sept. 30, 2023, 2:18 p.m. UTC | #1
On 30/09/2023 12:32, Robert Marko wrote:
> Allow passing QMP PCI PHY PIPE clocks to the IPQ8074 GCC to avoid having
> to do a global matching by name.

I would prefer commit msg refering to hardware, not driver. Basically
the PCI PHY pipe clocks are inputs to the clock controller.


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
index 52e7831a8d6d..2d44ddc45aab 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
@@ -27,11 +27,15 @@  properties:
     items:
       - description: board XO clock
       - description: sleep clock
+      - description: Gen3 QMP PCIe PHY PIPE clock
+      - description: Gen2 QMP PCIe PHY PIPE clock
 
   clock-names:
     items:
       - const: xo
       - const: sleep_clk
+      - const: pcie0_pipe
+      - const: pcie1_pipe
 
 required:
   - compatible