diff mbox series

[12/12] arm64: dts: qcom: sc8180x: flatten usb_sec node

Message ID 20231016-dwc3-refactor-v1-12-ab4a84165470@quicinc.com (mailing list archive)
State Changes Requested
Headers show
Series usb: dwc3: qcom: Flatten dwc3 structure | expand

Commit Message

Bjorn Andersson Oct. 17, 2023, 3:11 a.m. UTC 
Flatten one of the USB controllers in the SC8180X platform, as an
example.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
 .../arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts |  6 ++--
 arch/arm64/boot/dts/qcom/sc8180x-primus.dts        |  6 ++--
 arch/arm64/boot/dts/qcom/sc8180x.dtsi              | 34 +++++++++-------------
 3 files changed, 17 insertions(+), 29 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
index 3ea07d094b60..91a9d822ea43 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
+++ b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
@@ -607,11 +607,9 @@  &usb_sec_role_switch {
 };
 
 &usb_sec {
-	status = "okay";
-};
-
-&usb_sec_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &wifi {
diff --git a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
index fd2fab4895b3..a17c69b5aa57 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
+++ b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
@@ -684,11 +684,9 @@  &usb_sec_role_switch {
 };
 
 &usb_sec {
-	status = "okay";
-};
-
-&usb_sec_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &wifi {
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index a34f438ef2d9..f5e427789ad8 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -2605,8 +2605,8 @@  usb_prim_role_switch: endpoint {
 		};
 
 		usb_sec: usb@a8f8800 {
-			compatible = "qcom,sc8180x-dwc3", "qcom,dwc3";
-			reg = <0 0x0a8f8800 0 0x400>;
+			compatible = "qcom,sc8180x-dwc3", "qcom,dwc3", "snps,dwc3";
+			reg = <0 0x0a800000 0 0x200000>;
 
 			clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
 				 <&gcc GCC_USB30_SEC_MASTER_CLK>,
@@ -2622,11 +2622,12 @@  usb_sec: usb@a8f8800 {
 				      "xo";
 			resets = <&gcc GCC_USB30_SEC_BCR>;
 			power-domains = <&gcc USB30_SEC_GDSC>;
-			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+			interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "hs_phy_irq", "ss_phy_irq",
+			interrupt-names = "dwc_usb3", "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
 			assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
@@ -2637,26 +2638,17 @@  usb_sec: usb@a8f8800 {
 					<&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;
 			interconnect-names = "usb-ddr", "apps-usb";
 
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
-			dma-ranges;
+			iommus = <&apps_smmu 0x160 0>;
 
-			status = "disabled";
+			snps,dis_u2_susphy_quirk;
+			snps,dis_enblslpm_quirk;
+			phys = <&usb_sec_hsphy>, <&usb_sec_ssphy>;
+			phy-names = "usb2-phy", "usb3-phy";
 
-			usb_sec_dwc3: usb@a800000 {
-				compatible = "snps,dwc3";
-				reg = <0 0x0a800000 0 0xcd00>;
-				interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
-				iommus = <&apps_smmu 0x160 0>;
-				snps,dis_u2_susphy_quirk;
-				snps,dis_enblslpm_quirk;
-				phys = <&usb_sec_hsphy>, <&usb_sec_ssphy>;
-				phy-names = "usb2-phy", "usb3-phy";
+			status = "disabled";
 
-				port {
-					usb_sec_role_switch: endpoint {
-					};
+			port {
+				usb_sec_role_switch: endpoint {
 				};
 			};
 		};