From patchwork Fri Nov 17 10:18:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 13458774 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="HRmAdpC3" Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64C78199A; Fri, 17 Nov 2023 02:19:46 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AH6BSL2014578; Fri, 17 Nov 2023 10:19:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=esE1xvj0v4jRfjw747Rh8YtcLxrhWOr4U2W+76E4FJM=; b=HRmAdpC3XWMLHltpbdcNIeSZtFUKrTx0HKrkowJzMW8R0PTMokKFDBSiGWHP+J9ihm5q d5PrglQ2qibFt+3sgjjftda7tmUt1f5NivGO2YDUEzu+2ztSfCiyA0bkMEXqdDzz4/20 eFq4uY6+h75RPWWzL/VPLlYkU/eRRwaw20ghjXJtTl0gxGmRUHlBRXzMXXgvc90ITE1X xeSWGmsBmqpYwocmQd4xMV2Q3/SxYGh0g5pgRP2Ep1Mlpj3o04v5h1k3OweTd3cdfwpw rAmHWtLSKJPcnW4V7aWlx+6aoICzNTY17Wdcpztu5zFA6/K2i6l6nNM6WrOnkqSsfV1l tg== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3udt8bse4x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Nov 2023 10:19:41 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AHAJG24008747 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Nov 2023 10:19:16 GMT Received: from tengfan2-gv.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Fri, 17 Nov 2023 02:19:13 -0800 From: Tengfei Fan To: , , , , , , CC: , , , <-cc=kernel@quicinc.com>, Tengfei Fan Subject: [PATCH 10/16] arm64: dts: qcom: sm8550-aim300: add display and panel Date: Fri, 17 Nov 2023 18:18:11 +0800 Message-ID: <20231117101817.4401-11-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231117101817.4401-1-quic_tengfan@quicinc.com> References: <20231117101817.4401-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: u0So862fFDmPpMYlgjnnEcJZZM5xcQ7P X-Proofpoint-GUID: u0So862fFDmPpMYlgjnnEcJZZM5xcQ7P X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-17_08,2023-11-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 priorityscore=1501 suspectscore=0 mlxscore=0 mlxlogscore=891 adultscore=0 bulkscore=0 malwarescore=0 spamscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311170076 Enable Display Subsystem with Visionox VTDR6130 Panel. Signed-off-by: Tengfei Fan --- arch/arm64/boot/dts/qcom/sm8550-aim300.dts | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550-aim300.dts b/arch/arm64/boot/dts/qcom/sm8550-aim300.dts index cafddc02aef0..9b568ae9581e 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-aim300.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-aim300.dts @@ -432,6 +432,46 @@ <&usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK>; }; +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + vdda-supply = <&vreg_l3e_1p2>; + status = "okay"; + + panel@0 { + compatible = "visionox,vtdr6130"; + reg = <0>; + + pinctrl-0 = <&sde_dsi_active>, <&sde_te_active>; + pinctrl-1 = <&sde_dsi_suspend>, <&sde_te_suspend>; + pinctrl-names = "default", "sleep"; + + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; + + vci-supply = <&vreg_l13b_3p0>; + vdd-supply = <&vreg_l11b_1p2>; + vddio-supply = <&vreg_l12b_1p8>; + + port { + panel0_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + remote-endpoint = <&panel0_in>; + data-lanes = <0 1 2 3>; +}; + +&mdss_dsi0_phy { + vdds-supply = <&vreg_l1e_0p88>; + status = "okay"; +}; + &pcie_1_phy_aux_clk { status = "disabled"; }; @@ -533,6 +573,34 @@ &tlmm { gpio-reserved-ranges = <32 8>; + sde_dsi_active: sde-dsi-active-state { + pins = "gpio133"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + sde_dsi_suspend: sde-dsi-suspend-state { + pins = "gpio133"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + sde_te_active: sde-te-active-state { + pins = "gpio86"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-pull-down; + }; + + sde_te_suspend: sde-te-suspend-state { + pins = "gpio86"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-pull-down; + }; + wcd_default: wcd-reset-n-active-state { pins = "gpio108"; function = "gpio";