| Message ID | 20231202224247.1282567-3-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | MDSS reg bus interconnect | expand |
On 12/2/2023 2:42 PM, Dmitry Baryshkov wrote: > From: Konrad Dybcio <konrad.dybcio@linaro.org> > > The DPU1 driver needs to handle all MDPn<->DDR paths, as well as > CPU<->SLAVE_DISPLAY_CFG. The former ones share how their values are > calculated, but the latter one has static predefines spanning all SoCs. > > In preparation for supporting the CPU<->SLAVE_DISPLAY_CFG path, rename > the path-related struct members to include "mdp_". > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Minor nits and I am fine to fix them now or later as they existed even before this patch, 1) we can just have num_mdp_paths++ in both places instead of setting to 1 and then increment. 2) Maybe some macro like MAX_MDP_ICC_PATH instead of 2 will be better. 3) Wondering whether we even need a num_path/num_mdp_path and just use ARRAY_SIZE for the loop and then check if (mdp_path) OR even better if icc has some sort of bulk_set_bw with num of paths. Nothing these down but nothing to block this patch: Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > drivers/gpu/drm/msm/msm_mdss.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c > index 53bc496ace99..e1b208fd072e 100644 > --- a/drivers/gpu/drm/msm/msm_mdss.c > +++ b/drivers/gpu/drm/msm/msm_mdss.c > @@ -40,8 +40,8 @@ struct msm_mdss { > struct irq_domain *domain; > } irq_controller; > const struct msm_mdss_data *mdss_data; > - struct icc_path *path[2]; > - u32 num_paths; > + struct icc_path *mdp_path[2]; > + u32 num_mdp_paths; > }; > > static int msm_mdss_parse_data_bus_icc_path(struct device *dev, > @@ -54,13 +54,13 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, > if (IS_ERR_OR_NULL(path0)) > return PTR_ERR_OR_ZERO(path0); > > - msm_mdss->path[0] = path0; > - msm_mdss->num_paths = 1; > + msm_mdss->mdp_path[0] = path0; > + msm_mdss->num_mdp_paths = 1; > > path1 = devm_of_icc_get(dev, "mdp1-mem"); > if (!IS_ERR_OR_NULL(path1)) { > - msm_mdss->path[1] = path1; > - msm_mdss->num_paths++; > + msm_mdss->mdp_path[1] = path1; > + msm_mdss->num_mdp_paths++; > } > > return 0; > @@ -70,8 +70,8 @@ static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw) > { > int i; > > - for (i = 0; i < msm_mdss->num_paths; i++) > - icc_set_bw(msm_mdss->path[i], 0, Bps_to_icc(bw)); > + for (i = 0; i < msm_mdss->num_mdp_paths; i++) > + icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(bw)); > } > > static void msm_mdss_irq(struct irq_desc *desc)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 53bc496ace99..e1b208fd072e 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -40,8 +40,8 @@ struct msm_mdss { struct irq_domain *domain; } irq_controller; const struct msm_mdss_data *mdss_data; - struct icc_path *path[2]; - u32 num_paths; + struct icc_path *mdp_path[2]; + u32 num_mdp_paths; }; static int msm_mdss_parse_data_bus_icc_path(struct device *dev, @@ -54,13 +54,13 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, if (IS_ERR_OR_NULL(path0)) return PTR_ERR_OR_ZERO(path0); - msm_mdss->path[0] = path0; - msm_mdss->num_paths = 1; + msm_mdss->mdp_path[0] = path0; + msm_mdss->num_mdp_paths = 1; path1 = devm_of_icc_get(dev, "mdp1-mem"); if (!IS_ERR_OR_NULL(path1)) { - msm_mdss->path[1] = path1; - msm_mdss->num_paths++; + msm_mdss->mdp_path[1] = path1; + msm_mdss->num_mdp_paths++; } return 0; @@ -70,8 +70,8 @@ static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw) { int i; - for (i = 0; i < msm_mdss->num_paths; i++) - icc_set_bw(msm_mdss->path[i], 0, Bps_to_icc(bw)); + for (i = 0; i < msm_mdss->num_mdp_paths; i++) + icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(bw)); } static void msm_mdss_irq(struct irq_desc *desc)