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Sun, 28 Jan 2024 14:52:44 -0800 (PST) Received: from [127.0.1.1] ([79.115.23.25]) by smtp.gmail.com with ESMTPSA id k11-20020a1709061c0b00b00a30cd599285sm3259996ejg.223.2024.01.28.14.52.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Jan 2024 14:52:44 -0800 (PST) From: Abel Vesa Date: Mon, 29 Jan 2024 00:52:17 +0200 Subject: [PATCH v3 04/10] dt-bindings: clock: qcom: Document the X1E80100 TCSR Clock Controller Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240129-x1e80100-clock-controllers-v3-4-d96dacfed104@linaro.org> References: <20240129-x1e80100-clock-controllers-v3-0-d96dacfed104@linaro.org> In-Reply-To: <20240129-x1e80100-clock-controllers-v3-0-d96dacfed104@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Neil Armstrong , Vladimir Zapolskiy , Dmitry Baryshkov Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa , Rajendra Nayak , Krzysztof Kozlowski X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; 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a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE Add bindings documentation for the X1E80100 TCSR Clock Controller. Co-developed-by: Rajendra Nayak Signed-off-by: Rajendra Nayak Reviewed-by: Krzysztof Kozlowski Signed-off-by: Abel Vesa --- .../bindings/clock/qcom,sm8550-tcsr.yaml | 1 + include/dt-bindings/clock/qcom,x1e80100-tcsr.h | 23 ++++++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml index af16b05eac96..48fdd562d743 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml @@ -23,6 +23,7 @@ properties: - enum: - qcom,sm8550-tcsr - qcom,sm8650-tcsr + - qcom,x1e80100-tcsr - const: syscon clocks: diff --git a/include/dt-bindings/clock/qcom,x1e80100-tcsr.h b/include/dt-bindings/clock/qcom,x1e80100-tcsr.h new file mode 100644 index 000000000000..bae2c4654ee2 --- /dev/null +++ b/include/dt-bindings/clock/qcom,x1e80100-tcsr.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_X1E80100_TCSR_CC_H +#define _DT_BINDINGS_CLK_QCOM_X1E80100_TCSR_CC_H + +/* TCSR CC clocks */ +#define TCSR_PCIE_2L_4_CLKREF_EN 0 +#define TCSR_PCIE_2L_5_CLKREF_EN 1 +#define TCSR_PCIE_8L_CLKREF_EN 2 +#define TCSR_USB3_MP0_CLKREF_EN 3 +#define TCSR_USB3_MP1_CLKREF_EN 4 +#define TCSR_USB2_1_CLKREF_EN 5 +#define TCSR_UFS_PHY_CLKREF_EN 6 +#define TCSR_USB4_1_CLKREF_EN 7 +#define TCSR_USB4_2_CLKREF_EN 8 +#define TCSR_USB2_2_CLKREF_EN 9 +#define TCSR_PCIE_4L_CLKREF_EN 10 +#define TCSR_EDP_CLKREF_EN 11 + +#endif