From patchwork Fri Feb 2 13:36:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 13542903 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14F2E4778E; Fri, 2 Feb 2024 13:37:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706881042; cv=none; b=FbXvTitG/j4tgfJSMQ5FGPvD80Qd7DaFTUcEsAORzHxp7cJIdUylOkXDqq5me/NLF2uRJlONR2ioZ2ERkLJxlNoocplr+VVnYSAqOXKLvQL1AM4J//rJTbgUA2rhXHkv7dzQipliSPZJ7l0GxHeAITvzfiBELA4lsG2qqx2UZ/Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706881042; c=relaxed/simple; bh=uTrv0HYp2bDgDyKYE1WM3HNKNXnILDZVXcpyZiWYbQg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YG0kFomzcpbJ0ZT1ZCjPrnBovR0WUrVKHGR4mvgpg4x48SMybroGopvV567jb36k7D+iqs0P3RFNwPzwMNS2GUxO3YVMT7HTUKUOHGusAMYesfCHhw3Io3nw/lJvENIXz8HH3MoXbRhbr0EhUBYunwGfrYzxt3wX5XT9sZWFHUI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=fsLnkmr3; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="fsLnkmr3" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 4121jWgm009600; Fri, 2 Feb 2024 13:37:17 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=qcppdkim1; bh=Nc0zO5I hGWccGFJnhGwZfWxpFR99bZVsQBRq7Fa5xRY=; b=fsLnkmr3FeUvNfIxD3fjiX7 fiFnVZD0mkNvjyHc82V6CJzNxI3kJzioDr2vDsVb2F8UBG2q5XX3iIBOQQ+cwkv3 0JnXKWM9GS0TTe4E+pay5g8fctQ4iVFJswLYXSjk9dYzTTVlM/rcg07MIAIOn2ZC mP6kdcHHjR+RjiL7TT6gIYA7CTlVc31fw+XTVRbCrqseK2I9KXOJmlHgE7Ms+iqc 7BN6Vn3htKxCyGsa21PXJx6bBlC4ZX+9QinbTuvZACEF7k4JnZsfgG3QP6+1pDf0 qwN0LNZ0FL0iMp2cditxv2DL3lBg+YuZkq8pPKCoNgPUJvwEElUow6YiO/YbVnw= = Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3w0ptv1g1b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 02 Feb 2024 13:37:16 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 412Dajq7017957; Fri, 2 Feb 2024 13:36:45 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3vvtwm3wsw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 02 Feb 2024 13:36:45 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 412Daj3I017934; Fri, 2 Feb 2024 13:36:45 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.242.220]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 412DajPE017931; Fri, 02 Feb 2024 13:36:45 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 3944840) id CE94050094D; Fri, 2 Feb 2024 19:06:43 +0530 (+0530) From: Wasim Nazir To: andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, Wasim Nazir Subject: [PATCH 2/3] arm64: dts: qcom: Add initial support for rb5gen2 SOM Date: Fri, 2 Feb 2024 19:06:37 +0530 Message-ID: <20240202133638.4720-3-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240202133638.4720-1-quic_wasimn@quicinc.com> References: <20240202133638.4720-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: hYeDCpcEbqiNUFu8ATscYZ0Fukiw-l4J X-Proofpoint-GUID: hYeDCpcEbqiNUFu8ATscYZ0Fukiw-l4J X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-02_08,2024-01-31_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 impostorscore=0 bulkscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 phishscore=0 adultscore=0 mlxscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402020100 Rb5gen2 SOM is based on QCS8550 SoC, used for Rb5gen2 HDK. This initial version describes regulators & ufs storage. On-board components: - Qualcomm QCS8550 SoC - LPDDR5, 12 GiB - UFS3.1, 128 GiB On-board PMICs: - PM8550VS - PM8550VE - PM8550 - PM8550BH - PMK8550 Signed-off-by: Wasim Nazir --- 2.43.0 diff --git a/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dtsi b/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dtsi new file mode 100644 index 000000000000..6e2a644f3f7c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dtsi @@ -0,0 +1,438 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include "qcm8550.dtsi" +#include "pm8550.dtsi" +#include "pm8550b.dtsi" +#define PMK8550VE_SID 5 +#include "pm8550ve.dtsi" +#include "pm8550vs.dtsi" +#include "pmk8550.dtsi" + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id = "b"; + + vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>; + vdd-l2-l13-l14-supply = <&vreg_bob1>; + vdd-l5-l16-supply = <&vreg_bob1>; + vdd-l6-l7-supply = <&vreg_bob1>; + vdd-l8-l9-supply = <&vreg_bob1>; + vdd-l11-supply = <&vreg_s4g_1p25>; + vdd-l12-supply = <&vreg_s6g_1p86>; + vdd-l15-supply = <&vreg_s6g_1p86>; + vdd-l17-supply = <&vreg_bob2>; + + vreg_bob1: bob1 { + regulator-name = "vreg_bob1"; + regulator-min-microvolt = <3296000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = ; + }; + + vreg_bob2: bob2 { + regulator-name = "vreg_bob2"; + regulator-min-microvolt = <2720000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name = "vreg_l1b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name = "vreg_l2b_3p0"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l5b_3p1: ldo5 { + regulator-name = "vreg_l5b_3p1"; + regulator-min-microvolt = <3104000>; + regulator-max-microvolt = <3104000>; + regulator-initial-mode = ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name = "vreg_l6b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l7b_1p8: ldo7 { + regulator-name = "vreg_l7b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l8b_1p8: ldo8 { + regulator-name = "vreg_l8b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name = "vreg_l9b_2p9"; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l10b_1p8: ldo10 { + regulator-name = "vreg_l10b_1p8"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l11b_1p2: ldo11 { + regulator-name = "vreg_l11b_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1504000>; + regulator-initial-mode = ; + }; + + vreg_l12b_1p8: ldo12 { + regulator-name = "vreg_l12b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name = "vreg_l13b_3p0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = ; + }; + + vreg_l14b_3p2: ldo14 { + regulator-name = "vreg_l14b_3p2"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-initial-mode = ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name = "vreg_l15b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l16b_2p8: ldo16 { + regulator-name = "vreg_l16b_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name = "vreg_l17b_2p5"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2504000>; + regulator-initial-mode = ; + }; + }; + + regulators-1 { + compatible = "qcom,pm8550vs-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-l1-supply = <&vreg_s4g_1p25>; + vdd-l3-supply = <&vreg_s4e_0p95>; + + vreg_l1c_1p2: ldo1 { + regulator-name = "vreg_l1c_1p2"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + }; + + vreg_l3c_0p9: ldo3 { + regulator-name = "vreg_l3c_0p9"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + }; + }; + + regulators-2 { + compatible = "qcom,pm8550vs-rpmh-regulators"; + qcom,pmic-id = "d"; + + vdd-l1-supply = <&vreg_s4e_0p95>; + vdd-l2-supply = <&vreg_s4e_0p95>; + + vreg_s4d_0p628: smps4 { + regulator-name = "vreg_s4d_0p628"; + regulator-min-microvolt = <572000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_s5d_0p728: smps5 { + regulator-name = "vreg_s5d_0p728"; + regulator-min-microvolt = <465000>; + regulator-max-microvolt = <815000>; + regulator-initial-mode = ; + }; + + vreg_l1d_0p88: ldo1 { + regulator-name = "vreg_l1d_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <920000>; + regulator-initial-mode = ; + }; + + vreg_l2d_0p752: ldo2 { + regulator-name = "vreg_l2d_0p752"; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + }; + + regulators-3 { + compatible = "qcom,pm8550vs-rpmh-regulators"; + qcom,pmic-id = "e"; + + vdd-l1-supply = <&vreg_s4e_0p95>; + vdd-l2-supply = <&vreg_s4e_0p95>; + vdd-l3-supply = <&vreg_s4g_1p25>; + + vreg_l1e_0p88: ldo1 { + regulator-name = "vreg_l1e_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; + + vreg_l2e_0p9: ldo2 { + regulator-name = "vreg_l2e_0p9"; + regulator-min-microvolt = <904000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name = "vreg_l3e_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_s1e_0p728: smps1 { + regulator-name = "vreg_s1e_0p728"; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <832000>; + regulator-initial-mode = ; + }; + + vreg_s3e_0p752: smps3 { + regulator-name = "vreg_s3e_0p752"; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <795000>; + regulator-initial-mode = ; + }; + + vreg_s4e_0p95: smps4 { + regulator-name = "vreg_s4e_0p95"; + regulator-min-microvolt = <904000>; + regulator-max-microvolt = <984000>; + regulator-initial-mode = ; + }; + + vreg_s5e_1p08: smps5 { + regulator-name = "vreg_s5e_1p08"; + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1120000>; + regulator-initial-mode = ; + }; + + vreg_s6e_0p728: smps6 { + regulator-name = "vreg_s6e_0p728"; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + }; + + regulators-4 { + compatible = "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id = "f"; + + vdd-l1-supply = <&vreg_s4e_0p95>; + vdd-l2-supply = <&vreg_s4e_0p95>; + vdd-l3-supply = <&vreg_s4e_0p95>; + + vreg_l1f_0p9: ldo1 { + regulator-name = "vreg_l1f_0p9"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + }; + + vreg_l2f_0p88: ldo2 { + regulator-name = "vreg_l2f_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + }; + + vreg_l3f_0p88: ldo3 { + regulator-name = "vreg_l3f_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + }; + + vreg_s1f_0p728: smps1 { + regulator-name = "vreg_s1f_0p728"; + regulator-min-microvolt = <584000>; + regulator-max-microvolt = <856000>; + regulator-initial-mode = ; + }; + + vreg_s3f_0p825: smps3 { + regulator-name = "vreg_s3f_0p825"; + regulator-min-microvolt = <640000>; + regulator-max-microvolt = <1000000>; + regulator-initial-mode = ; + }; + + vreg_s4f_0p5: smps4 { + regulator-name = "vreg_s4f_0p5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <700000>; + regulator-initial-mode = ; + }; + + vreg_s5f_0p752: smps5 { + regulator-name = "vreg_s5f_0p752"; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_s7f_0p628: smps7 { + regulator-name = "vreg_s7f_0p628"; + regulator-min-microvolt = <465000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = ; + }; + }; + + regulators-5 { + compatible = "qcom,pm8550vs-rpmh-regulators"; + qcom,pmic-id = "g"; + + vdd-l1-supply = <&vreg_s4g_1p25>; + vdd-l2-supply = <&vreg_s4g_1p25>; + vdd-l3-supply = <&vreg_s4g_1p25>; + + vreg_l1g_1p2: ldo1 { + regulator-name = "vreg_l1g_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l2g_1p2: ldo2 { + regulator-name = "vreg_l2g_1p2"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + }; + + vreg_l3g_1p2: ldo3 { + regulator-name = "vreg_l3g_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_s1g_1p25: smps1 { + regulator-name = "vreg_s1g_1p25"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + }; + + vreg_s2g_0p85: smps2 { + regulator-name = "vreg_s2g_0p85"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1000000>; + regulator-initial-mode = ; + }; + + vreg_s3g_0p8: smps3 { + regulator-name = "vreg_s3g_0p8"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1004000>; + regulator-initial-mode = ; + }; + + vreg_s4g_1p25: smps4 { + regulator-name = "vreg_s4g_1p25"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1352000>; + regulator-initial-mode = ; + }; + + vreg_s5g_0p85: smps5 { + regulator-name = "vreg_s5g_0p85"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1004000>; + regulator-initial-mode = ; + }; + + vreg_s6g_1p86: smps6 { + regulator-name = "vreg_s6g_1p86"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + }; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&ufs_mem_hc { + reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>; + vcc-supply = <&vreg_l17b_2p5>; + vcc-max-microamp = <1300000>; + vccq-supply = <&vreg_l1g_1p2>; + vccq-max-microamp = <1200000>; + + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l1d_0p88>; + vdda-pll-supply = <&vreg_l3e_1p2>; + + status = "okay"; +}; + +&xo_board { + clock-frequency = <76800000>; +};