diff mbox series

[v2] arm64: dts: qcom: sm8650: Add three missing fastrpc-compute-cb nodes

Message ID 20240319032816.27070-1-quic_lxu5@quicinc.com (mailing list archive)
State Accepted
Commit dae8cdb0a9e18f0cc7bda75e42d0da750e05ca77
Headers show
Series [v2] arm64: dts: qcom: sm8650: Add three missing fastrpc-compute-cb nodes | expand

Commit Message

Ling Xu March 19, 2024, 3:28 a.m. UTC
Add three missing cDSP fastrpc compute-cb nodes for the SM8650 SoC.

Signed-off-by: Ling Xu <quic_lxu5@quicinc.com>
---
* v1->v2: Lowercase hex
  v1: https://lore.kernel.org/linux-arm-msm/20240314063334.31942-1-quic_lxu5@quicinc.com/
---
---
 arch/arm64/boot/dts/qcom/sm8650.dtsi | 32 ++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

Comments

Bjorn Andersson April 21, 2024, 10:29 p.m. UTC | #1
On Tue, 19 Mar 2024 08:58:16 +0530, Ling Xu wrote:
> Add three missing cDSP fastrpc compute-cb nodes for the SM8650 SoC.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sm8650: Add three missing fastrpc-compute-cb nodes
      commit: dae8cdb0a9e18f0cc7bda75e42d0da750e05ca77

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index ba72d8f38420..57158e4606b1 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5084,6 +5084,38 @@ 
 							 <&apps_smmu 0x19c8 0x0>;
 						dma-coherent;
 					};
+
+					/* note: secure cb9 in downstream */
+
+					compute-cb@10 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <12>;
+
+						iommus = <&apps_smmu 0x196c 0x0>,
+							 <&apps_smmu 0x0c0c 0x20>,
+							 <&apps_smmu 0x19cc 0x0>;
+						dma-coherent;
+					};
+
+					compute-cb@11 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <13>;
+
+						iommus = <&apps_smmu 0x196d 0x0>,
+							 <&apps_smmu 0x0c0d 0x20>,
+							 <&apps_smmu 0x19cd 0x0>;
+						dma-coherent;
+					};
+
+					compute-cb@12 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <14>;
+
+						iommus = <&apps_smmu 0x196e 0x0>,
+							 <&apps_smmu 0x0c0e 0x20>,
+							 <&apps_smmu 0x19ce 0x0>;
+						dma-coherent;
+					};
 				};
 			};
 		};