Message ID | 20240321-pcie-qcom-bridge-dts-v2-21-1eb790c53e43@linaro.org (mailing list archive) |
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State | Accepted |
Headers | show
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Series |
Add PCIe bridge node in DT for Qcom SoCs
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expand
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diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 06d2b6432ab1..b25fefd6a786 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2208,7 +2208,7 @@ rng: rng@10c3000 { reg = <0 0x010c3000 0 0x1000>; }; - pcie0: pci@1c00000 { + pcie0: pcie@1c00000 { device_type = "pci"; compatible = "qcom,pcie-sm8650", "qcom,pcie-sm8550"; reg = <0 0x01c00000 0 0x3000>, @@ -2337,7 +2337,7 @@ pcie0_phy: phy@1c06000 { status = "disabled"; }; - pcie1: pci@1c08000 { + pcie1: pcie@1c08000 { device_type = "pci"; compatible = "qcom,pcie-sm8650", "qcom,pcie-sm8550"; reg = <0 0x01c08000 0 0x3000>,