diff mbox series

[V2,RESEND,2/6] clk: qcom: videocc-sm8550: Add support for videocc XO clk ares

Message ID 20240321092529.13362-3-quic_jkona@quicinc.com (mailing list archive)
State Superseded
Headers show
Series Add support for videocc and camcc on SM8650 | expand

Commit Message

Jagadeesh Kona March 21, 2024, 9:25 a.m. UTC
Add support for videocc XO clk ares for consumer drivers to be
able to request for this reset.

Fixes: f53153a37969 ("clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550")
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
---
 drivers/clk/qcom/videocc-sm8550.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Dmitry Baryshkov March 21, 2024, 9:44 a.m. UTC | #1
On Thu, 21 Mar 2024 at 11:26, Jagadeesh Kona <quic_jkona@quicinc.com> wrote:
>
> Add support for videocc XO clk ares for consumer drivers to be
> able to request for this reset.

Nit: s/for//

>
> Fixes: f53153a37969 ("clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550")
> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

> ---
>  drivers/clk/qcom/videocc-sm8550.c | 1 +
>  1 file changed, 1 insertion(+)
Jagadeesh Kona March 21, 2024, 11:36 a.m. UTC | #2
On 3/21/2024 3:14 PM, Dmitry Baryshkov wrote:
> On Thu, 21 Mar 2024 at 11:26, Jagadeesh Kona <quic_jkona@quicinc.com> wrote:
>>
>> Add support for videocc XO clk ares for consumer drivers to be
>> able to request for this reset.
> 
> Nit: s/for//
> 

Sure, will update this in next series.

Thanks,
Jagadeesh

>>
>> Fixes: f53153a37969 ("clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550")
>> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
>> ---
>>   drivers/clk/qcom/videocc-sm8550.c | 1 +
>>   1 file changed, 1 insertion(+)
> 
>
Konrad Dybcio March 23, 2024, 12:30 a.m. UTC | #3
On 21.03.2024 10:25, Jagadeesh Kona wrote:
> Add support for videocc XO clk ares for consumer drivers to be
> able to request for this reset.
> 
> Fixes: f53153a37969 ("clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550")
> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
> ---

I think I might have asked already, but I'm assuming these resets
are also there on 8550, since the hw seems to be mostly unchanged

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Jagadeesh Kona March 25, 2024, 6:09 a.m. UTC | #4
On 3/23/2024 6:00 AM, Konrad Dybcio wrote:
> On 21.03.2024 10:25, Jagadeesh Kona wrote:
>> Add support for videocc XO clk ares for consumer drivers to be
>> able to request for this reset.
>>
>> Fixes: f53153a37969 ("clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550")
>> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
>> ---
> 
> I think I might have asked already, but I'm assuming these resets
> are also there on 8550, since the hw seems to be mostly unchanged
>
Thanks Konrad for your review.

Yes, videocc XO clk ares is present on 8550 as well, hence it is safe to 
model this reset for both 8550 and 8650.

Thanks,
Jagadeesh

> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> 
> Konrad
diff mbox series

Patch

diff --git a/drivers/clk/qcom/videocc-sm8550.c b/drivers/clk/qcom/videocc-sm8550.c
index d73f747d2474..3a19204a9063 100644
--- a/drivers/clk/qcom/videocc-sm8550.c
+++ b/drivers/clk/qcom/videocc-sm8550.c
@@ -380,6 +380,7 @@  static const struct qcom_reset_map video_cc_sm8550_resets[] = {
 	[CVP_VIDEO_CC_MVS1C_BCR] = { 0x8074 },
 	[VIDEO_CC_MVS0C_CLK_ARES] = { .reg = 0x8064, .bit = 2, .udelay = 1000 },
 	[VIDEO_CC_MVS1C_CLK_ARES] = { .reg = 0x8090, .bit = 2, .udelay = 1000 },
+	[VIDEO_CC_XO_CLK_ARES] = { .reg = 0x8124, .bit = 2, .udelay = 100 },
 };
 
 static const struct regmap_config video_cc_sm8550_regmap_config = {