diff mbox series

[v2,1/2] mtd: rawnand: qcom: Fix broken erase in misc_cmd_type in exec_op

Message ID 20240325103053.24408-1-ansuelsmth@gmail.com (mailing list archive)
State Not Applicable
Headers show
Series [v2,1/2] mtd: rawnand: qcom: Fix broken erase in misc_cmd_type in exec_op | expand

Commit Message

Christian Marangi March 25, 2024, 10:30 a.m. UTC
misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409
("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was
reworked and generalized but actually broke the handling of the
ERASE_BLOCK command.

Additional logic was added to the erase command cycle without clear
explaination causing the erase command to be broken on testing it on
a ipq806x nandc.

Fix the erase command by reverting the additional logic and only adding
the NAND_DEV0_CFG0 additional call (required for erase command).

Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path")
Cc: stable@vger.kernel.org
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
Changes v2:
- Split this and rework commit description and title

 drivers/mtd/nand/raw/qcom_nandc.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

Comments

Manivannan Sadhasivam March 26, 2024, 7:25 a.m. UTC | #1
On Mon, Mar 25, 2024 at 11:30:47AM +0100, Christian Marangi wrote:
> misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409
> ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was
> reworked and generalized but actually broke the handling of the
> ERASE_BLOCK command.
> 
> Additional logic was added to the erase command cycle without clear
> explaination causing the erase command to be broken on testing it on
> a ipq806x nandc.
> 
> Fix the erase command by reverting the additional logic and only adding
> the NAND_DEV0_CFG0 additional call (required for erase command).
> 
> Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path")
> Cc: stable@vger.kernel.org
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> ---
> Changes v2:
> - Split this and rework commit description and title
> 
>  drivers/mtd/nand/raw/qcom_nandc.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> index b079605c84d3..19d76e345a49 100644
> --- a/drivers/mtd/nand/raw/qcom_nandc.c
> +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
>  	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
>  
>  	write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL);
> -	(q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0,
> -	2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc,
> -	NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
> +	if (q_op.cmd_reg == OP_BLOCK_ERASE)
> +		write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL);

So this only avoids the call to, 'read_reg_dma(nandc, NAND_FLASH_STATUS, 1,
NAND_BAM_NEXT_SGL)' if q_op.cmd_reg != OP_BLOCK_ERASE. But for q_op.cmd_reg ==
OP_BLOCK_ERASE, the result is the same.

I'm wondering how it results in fixing the OP_BLOCK_ERASE command.

Can you share the actual issue that you are seeing? Like error logs etc...

- Mani
Manivannan Sadhasivam March 26, 2024, 7:39 a.m. UTC | #2
On Tue, Mar 26, 2024 at 12:55:19PM +0530, Manivannan Sadhasivam wrote:
> On Mon, Mar 25, 2024 at 11:30:47AM +0100, Christian Marangi wrote:
> > misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409
> > ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was
> > reworked and generalized but actually broke the handling of the
> > ERASE_BLOCK command.
> > 
> > Additional logic was added to the erase command cycle without clear
> > explaination causing the erase command to be broken on testing it on
> > a ipq806x nandc.
> > 
> > Fix the erase command by reverting the additional logic and only adding
> > the NAND_DEV0_CFG0 additional call (required for erase command).
> > 
> > Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path")
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > ---
> > Changes v2:
> > - Split this and rework commit description and title
> > 
> >  drivers/mtd/nand/raw/qcom_nandc.c | 5 ++---
> >  1 file changed, 2 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> > index b079605c84d3..19d76e345a49 100644
> > --- a/drivers/mtd/nand/raw/qcom_nandc.c
> > +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> > @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
> >  	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
> >  
> >  	write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL);
> > -	(q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0,
> > -	2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc,
> > -	NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
> > +	if (q_op.cmd_reg == OP_BLOCK_ERASE)
> > +		write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL);
> 
> So this only avoids the call to, 'read_reg_dma(nandc, NAND_FLASH_STATUS, 1,
> NAND_BAM_NEXT_SGL)' if q_op.cmd_reg != OP_BLOCK_ERASE. But for q_op.cmd_reg ==
> OP_BLOCK_ERASE, the result is the same.
> 
> I'm wondering how it results in fixing the OP_BLOCK_ERASE command.
> 

Perhaps you are trying to fix the OP_RESET_DEVICE command altogether?

- Mani
Christian Marangi March 27, 2024, 2:41 p.m. UTC | #3
On Tue, Mar 26, 2024 at 01:09:47PM +0530, Manivannan Sadhasivam wrote:
> On Tue, Mar 26, 2024 at 12:55:19PM +0530, Manivannan Sadhasivam wrote:
> > On Mon, Mar 25, 2024 at 11:30:47AM +0100, Christian Marangi wrote:
> > > misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409
> > > ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was
> > > reworked and generalized but actually broke the handling of the
> > > ERASE_BLOCK command.
> > > 
> > > Additional logic was added to the erase command cycle without clear
> > > explaination causing the erase command to be broken on testing it on
> > > a ipq806x nandc.
> > > 
> > > Fix the erase command by reverting the additional logic and only adding
> > > the NAND_DEV0_CFG0 additional call (required for erase command).
> > > 
> > > Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path")
> > > Cc: stable@vger.kernel.org
> > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > ---
> > > Changes v2:
> > > - Split this and rework commit description and title
> > > 
> > >  drivers/mtd/nand/raw/qcom_nandc.c | 5 ++---
> > >  1 file changed, 2 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> > > index b079605c84d3..19d76e345a49 100644
> > > --- a/drivers/mtd/nand/raw/qcom_nandc.c
> > > +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> > > @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
> > >  	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
> > >  
> > >  	write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL);
> > > -	(q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0,
> > > -	2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc,
> > > -	NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
> > > +	if (q_op.cmd_reg == OP_BLOCK_ERASE)
> > > +		write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL);
> > 
> > So this only avoids the call to, 'read_reg_dma(nandc, NAND_FLASH_STATUS, 1,
> > NAND_BAM_NEXT_SGL)' if q_op.cmd_reg != OP_BLOCK_ERASE. But for q_op.cmd_reg ==
> > OP_BLOCK_ERASE, the result is the same.
> > 
> > I'm wondering how it results in fixing the OP_BLOCK_ERASE command.
> > 
> 
> Perhaps you are trying to fix the OP_RESET_DEVICE command altogether?
>

Well with this only patch correct working of nandc on ipq806x is
restored. I'm still very confused how since the misc command currently
works only with the PROGRAM_PAGE and the BLOCK_ERASE (from ERASE1 and
ERASE2)

Still the extra read was added with no explaination and I couldn't find
this command cycle in any of the previous legacy function and the one
introduced after the parser rework.
Christian Marangi March 27, 2024, 3:20 p.m. UTC | #4
On Tue, Mar 26, 2024 at 12:55:12PM +0530, Manivannan Sadhasivam wrote:
> On Mon, Mar 25, 2024 at 11:30:47AM +0100, Christian Marangi wrote:
> > misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409
> > ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was
> > reworked and generalized but actually broke the handling of the
> > ERASE_BLOCK command.
> > 
> > Additional logic was added to the erase command cycle without clear
> > explaination causing the erase command to be broken on testing it on
> > a ipq806x nandc.
> > 
> > Fix the erase command by reverting the additional logic and only adding
> > the NAND_DEV0_CFG0 additional call (required for erase command).
> > 
> > Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path")
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > ---
> > Changes v2:
> > - Split this and rework commit description and title
> > 
> >  drivers/mtd/nand/raw/qcom_nandc.c | 5 ++---
> >  1 file changed, 2 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> > index b079605c84d3..19d76e345a49 100644
> > --- a/drivers/mtd/nand/raw/qcom_nandc.c
> > +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> > @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
> >  	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
> >  
> >  	write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL);
> > -	(q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0,
> > -	2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc,
> > -	NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
> > +	if (q_op.cmd_reg == OP_BLOCK_ERASE)
> > +		write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL);
> 
> So this only avoids the call to, 'read_reg_dma(nandc, NAND_FLASH_STATUS, 1,
> NAND_BAM_NEXT_SGL)' if q_op.cmd_reg != OP_BLOCK_ERASE. But for q_op.cmd_reg ==
> OP_BLOCK_ERASE, the result is the same.
> 
> I'm wondering how it results in fixing the OP_BLOCK_ERASE command.
> 
> Can you share the actual issue that you are seeing? Like error logs etc...
>

Issue is that nandc goes to ADM timeout as soon as a BLOCK_ERASE is
called. BLOCK_ERASE operation match also another operation from MTD
read. (parser also maps to other stuff)

I will be away from the testing board for 7-10 days so I can't provide
logs currently.
Miquel Raynal March 27, 2024, 4:51 p.m. UTC | #5
Hi,

ansuelsmth@gmail.com wrote on Wed, 27 Mar 2024 16:20:58 +0100:

> On Tue, Mar 26, 2024 at 12:55:12PM +0530, Manivannan Sadhasivam wrote:
> > On Mon, Mar 25, 2024 at 11:30:47AM +0100, Christian Marangi wrote:  
> > > misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409
> > > ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was
> > > reworked and generalized but actually broke the handling of the
> > > ERASE_BLOCK command.
> > > 
> > > Additional logic was added to the erase command cycle without clear
> > > explaination causing the erase command to be broken on testing it on
> > > a ipq806x nandc.
> > > 
> > > Fix the erase command by reverting the additional logic and only adding
> > > the NAND_DEV0_CFG0 additional call (required for erase command).
> > > 
> > > Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path")
> > > Cc: stable@vger.kernel.org
> > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > ---
> > > Changes v2:
> > > - Split this and rework commit description and title
> > > 
> > >  drivers/mtd/nand/raw/qcom_nandc.c | 5 ++---
> > >  1 file changed, 2 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> > > index b079605c84d3..19d76e345a49 100644
> > > --- a/drivers/mtd/nand/raw/qcom_nandc.c
> > > +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> > > @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
> > >  	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
> > >  
> > >  	write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL);
> > > -	(q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0,
> > > -	2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc,
> > > -	NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
> > > +	if (q_op.cmd_reg == OP_BLOCK_ERASE)
> > > +		write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL);  
> > 
> > So this only avoids the call to, 'read_reg_dma(nandc, NAND_FLASH_STATUS, 1,
> > NAND_BAM_NEXT_SGL)' if q_op.cmd_reg != OP_BLOCK_ERASE. But for q_op.cmd_reg ==
> > OP_BLOCK_ERASE, the result is the same.
> > 
> > I'm wondering how it results in fixing the OP_BLOCK_ERASE command.
> > 
> > Can you share the actual issue that you are seeing? Like error logs etc...
> >  
> 
> Issue is that nandc goes to ADM timeout as soon as a BLOCK_ERASE is
> called. BLOCK_ERASE operation match also another operation from MTD
> read. (parser also maps to other stuff)
> 
> I will be away from the testing board for 7-10 days so I can't provide
> logs currently.

So, shall we wait for additional logs from Christian or shall I merge
the two-patches series? I'm not sure what's the status anymore.

Thanks,
Miquèl
Manivannan Sadhasivam March 28, 2024, 3:47 a.m. UTC | #6
On Wed, Mar 27, 2024 at 05:51:31PM +0100, Miquel Raynal wrote:
> Hi,
> 
> ansuelsmth@gmail.com wrote on Wed, 27 Mar 2024 16:20:58 +0100:
> 
> > On Tue, Mar 26, 2024 at 12:55:12PM +0530, Manivannan Sadhasivam wrote:
> > > On Mon, Mar 25, 2024 at 11:30:47AM +0100, Christian Marangi wrote:  
> > > > misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409
> > > > ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was
> > > > reworked and generalized but actually broke the handling of the
> > > > ERASE_BLOCK command.
> > > > 
> > > > Additional logic was added to the erase command cycle without clear
> > > > explaination causing the erase command to be broken on testing it on
> > > > a ipq806x nandc.
> > > > 
> > > > Fix the erase command by reverting the additional logic and only adding
> > > > the NAND_DEV0_CFG0 additional call (required for erase command).
> > > > 
> > > > Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path")
> > > > Cc: stable@vger.kernel.org
> > > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > > ---
> > > > Changes v2:
> > > > - Split this and rework commit description and title
> > > > 
> > > >  drivers/mtd/nand/raw/qcom_nandc.c | 5 ++---
> > > >  1 file changed, 2 insertions(+), 3 deletions(-)
> > > > 
> > > > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> > > > index b079605c84d3..19d76e345a49 100644
> > > > --- a/drivers/mtd/nand/raw/qcom_nandc.c
> > > > +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> > > > @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
> > > >  	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
> > > >  
> > > >  	write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL);
> > > > -	(q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0,
> > > > -	2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc,
> > > > -	NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
> > > > +	if (q_op.cmd_reg == OP_BLOCK_ERASE)
> > > > +		write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL);  
> > > 
> > > So this only avoids the call to, 'read_reg_dma(nandc, NAND_FLASH_STATUS, 1,
> > > NAND_BAM_NEXT_SGL)' if q_op.cmd_reg != OP_BLOCK_ERASE. But for q_op.cmd_reg ==
> > > OP_BLOCK_ERASE, the result is the same.
> > > 
> > > I'm wondering how it results in fixing the OP_BLOCK_ERASE command.
> > > 
> > > Can you share the actual issue that you are seeing? Like error logs etc...
> > >  
> > 
> > Issue is that nandc goes to ADM timeout as soon as a BLOCK_ERASE is
> > called. BLOCK_ERASE operation match also another operation from MTD
> > read. (parser also maps to other stuff)
> > 
> > I will be away from the testing board for 7-10 days so I can't provide
> > logs currently.
> 
> So, shall we wait for additional logs from Christian or shall I merge
> the two-patches series? I'm not sure what's the status anymore.
> 

TBH, I don't know how OP_BLOCK_ERASE can fail without this change. But I can
clearly see the 2 patches required for OP_RESET_DEVICE command. But merging the
patches as it is doesn't look good to me.

So I think if Christian can club the two patches into 1 as like v1 and reword
the commit message and subject to reflect the fact that OP_RESET_DEVICE command
is being fixed would work for me.

- Mani
Christian Marangi March 28, 2024, 2:22 p.m. UTC | #7
On Thu, Mar 28, 2024 at 09:17:32AM +0530, Manivannan Sadhasivam wrote:
> On Wed, Mar 27, 2024 at 05:51:31PM +0100, Miquel Raynal wrote:
> > Hi,
> > 
> > ansuelsmth@gmail.com wrote on Wed, 27 Mar 2024 16:20:58 +0100:
> > 
> > > On Tue, Mar 26, 2024 at 12:55:12PM +0530, Manivannan Sadhasivam wrote:
> > > > On Mon, Mar 25, 2024 at 11:30:47AM +0100, Christian Marangi wrote:  
> > > > > misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409
> > > > > ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was
> > > > > reworked and generalized but actually broke the handling of the
> > > > > ERASE_BLOCK command.
> > > > > 
> > > > > Additional logic was added to the erase command cycle without clear
> > > > > explaination causing the erase command to be broken on testing it on
> > > > > a ipq806x nandc.
> > > > > 
> > > > > Fix the erase command by reverting the additional logic and only adding
> > > > > the NAND_DEV0_CFG0 additional call (required for erase command).
> > > > > 
> > > > > Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path")
> > > > > Cc: stable@vger.kernel.org
> > > > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > > > ---
> > > > > Changes v2:
> > > > > - Split this and rework commit description and title
> > > > > 
> > > > >  drivers/mtd/nand/raw/qcom_nandc.c | 5 ++---
> > > > >  1 file changed, 2 insertions(+), 3 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> > > > > index b079605c84d3..19d76e345a49 100644
> > > > > --- a/drivers/mtd/nand/raw/qcom_nandc.c
> > > > > +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> > > > > @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
> > > > >  	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
> > > > >  
> > > > >  	write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL);
> > > > > -	(q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0,
> > > > > -	2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc,
> > > > > -	NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
> > > > > +	if (q_op.cmd_reg == OP_BLOCK_ERASE)
> > > > > +		write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL);  
> > > > 
> > > > So this only avoids the call to, 'read_reg_dma(nandc, NAND_FLASH_STATUS, 1,
> > > > NAND_BAM_NEXT_SGL)' if q_op.cmd_reg != OP_BLOCK_ERASE. But for q_op.cmd_reg ==
> > > > OP_BLOCK_ERASE, the result is the same.
> > > > 
> > > > I'm wondering how it results in fixing the OP_BLOCK_ERASE command.
> > > > 
> > > > Can you share the actual issue that you are seeing? Like error logs etc...
> > > >  
> > > 
> > > Issue is that nandc goes to ADM timeout as soon as a BLOCK_ERASE is
> > > called. BLOCK_ERASE operation match also another operation from MTD
> > > read. (parser also maps to other stuff)
> > > 
> > > I will be away from the testing board for 7-10 days so I can't provide
> > > logs currently.
> > 
> > So, shall we wait for additional logs from Christian or shall I merge
> > the two-patches series? I'm not sure what's the status anymore.
> > 
> 
> TBH, I don't know how OP_BLOCK_ERASE can fail without this change. But I can
> clearly see the 2 patches required for OP_RESET_DEVICE command. But merging the
> patches as it is doesn't look good to me.
> 
> So I think if Christian can club the two patches into 1 as like v1 and reword
> the commit message and subject to reflect the fact that OP_RESET_DEVICE command
> is being fixed would work for me.
>

Ok will do, very confusing and sorry for not providing additiona log. I
was adding support for ipq806x for 6.6 and notice the regression.

Will rework the patch.
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index b079605c84d3..19d76e345a49 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -2830,9 +2830,8 @@  static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
 	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
 
 	write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL);
-	(q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0,
-	2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc,
-	NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
+	if (q_op.cmd_reg == OP_BLOCK_ERASE)
+		write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL);
 
 	write_reg_dma(nandc, NAND_EXEC_CMD, 1, NAND_BAM_NEXT_SGL);
 	read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);