From patchwork Tue Apr 2 10:34:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 13613679 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 544DB83CC9; Tue, 2 Apr 2024 10:35:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712054101; cv=none; b=IvSQHtr7IDVysbOYeAtD4Yj4Sx5TobBOBP5+ZnOliSkF129rq2Z1xPEMXVNg+bci3tXn8fIj9EtAuwhCSYb42uQZH+PHhv3lQZFJ+cCJVf4eW/6yB0V8ylm0vXwjpTmsJz5xodd0Ey2dhYuv5SEHZjo17nRu0w3JapQdEf6csN4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712054101; c=relaxed/simple; bh=IZEDql9TaCbLvfokZOmzizHXTAThB8A099ulSk6bvJ0=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=S0DJzJVHRACdz18ln7QQeXREBl2/6LQOMptU/MlP3hUhrnsV23yl2EiXiw4JJzasF2Ddzo3I1ivjcQ4Cr2EMjDuoHrTm2+iTWpWNHDfYPJ9FWFgwCHbQ908DYai1K/DEbTVe7Echudd9LBu0kHOIMqFvJ6OT9gDZ3T3Z0pH7Qps= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=NdHPDFvM; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="NdHPDFvM" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 4329g5q2026665; Tue, 2 Apr 2024 10:34:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=vbsLvSNhMWyG2feJnl0G6Ip7uTubwqd7zr/AbRWBdro=; b=Nd HPDFvMVUcTT96xfIJ28jpe+rcEEqgaWbRiI83jj6kdAVwC1LwGUWen9FWvET4G1t 7lNDREDvhIPlgb0Td3Fsv88lg4Jl8vxbtpyV8Vh1zKPf59SIcHa1bWY5eT1foDe1 GX6vWA7XKAUkzIun7I1djL9x/Zy5Q0nEKO/lK83OJtUER9rlzPKuNU+JzqKdA85L fExTT61oTFxa2yiSjdS7mLqhIhFq+c4FcYKDvA3UB/pJrjKSxto4WOd0eFpow7nM Ru5g+X7dLAbLQ6PehMEgiUFos9uzK1RdQFV8zolU6ANy313jSd3LAtaMDw6xEOKl fb2gbMkdtK2oXC++I6Ow== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3x8fm1r5nf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 02 Apr 2024 10:34:56 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 432AYts1017948 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 2 Apr 2024 10:34:55 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 2 Apr 2024 03:34:50 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , Subject: [PATCH v6 6/6] arm64: dts: qcom: ipq9574: Add icc provider ability to gcc Date: Tue, 2 Apr 2024 16:04:06 +0530 Message-ID: <20240402103406.3638821-7-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240402103406.3638821-1-quic_varada@quicinc.com> References: <20240402103406.3638821-1-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 6q9RLj5_sOpvdOjVX6d2GS411X_4Fj8I X-Proofpoint-ORIG-GUID: 6q9RLj5_sOpvdOjVX6d2GS411X_4Fj8I X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-02_04,2024-04-01_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 clxscore=1015 impostorscore=0 bulkscore=0 adultscore=0 priorityscore=1501 mlxlogscore=999 suspectscore=0 lowpriorityscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403210001 definitions=main-2404020076 IPQ SoCs dont involve RPM in managing NoC related clocks and there is no NoC scaling. Linux itself handles these clocks. However, these should not be exposed as just clocks and align with other Qualcomm SoCs that handle these clocks from a interconnect provider. Hence include icc provider capability to the gcc node so that peripherals can use the interconnect facility to enable these clocks. Signed-off-by: Varadarajan Narayanan Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 7f2e5cbf3bbb..5b3e69379b1f 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -306,6 +307,7 @@ gcc: clock-controller@1800000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + #interconnect-cells = <1>; }; tcsr_mutex: hwlock@1905000 {