From patchwork Tue Apr 23 17:19:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13640465 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 788BC13D8BE; Tue, 23 Apr 2024 17:22:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713892943; cv=none; b=ePZ8e2M6KfNKrDLsIDb3quwRH4Lc7vkVhUK4SxnulbSwXkdmAZ/mDRo74o+CspoQFO0HrwatYGowmkpctSkIZxZf48Q8/u+7+1r+BV6fHjapR/rItKyUKv6q9nG2AqOdBqIRpQBev5qXI8ZahuoW8uDiW/cZHvlPVXXqP5KWqjw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713892943; c=relaxed/simple; bh=SGMALI4QdYtZABn10T5pVJnncfss1vQ8bKDWh3dyHOM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZimzvXnLpWSSmiMuLEGWGzu5XVTgMBMIvmTMe45vSB7XKjP4OuFamb+WzGh21wV4PLOwsGSJ1hHB0liE3tNVYTmD6nXTRH7h1SXMJ+E9DCtc1dqb0bXG4tKe7Krpl3nX4BkY6uA2xpxy+dr9igIr+7tHmwmSQN9lVPmCiPvnRQg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=b1Qzbplr; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="b1Qzbplr" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713892942; x=1745428942; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SGMALI4QdYtZABn10T5pVJnncfss1vQ8bKDWh3dyHOM=; b=b1QzbplrnKGM2wd8jCWcqM8DOLGCe//hFb9oxfrP/nREgg6Zsa6nS3ml +1VTActs9ITVR1N6kVOqOHviQvNoyEg5StZKIdyqnQGUXX0BusgmJk/Hg WBiCMjrrSJ9evgVP27ES9mXaf+rh/hH23nNK4hGSVcZi1nMhpL834PKAE dO3KQWOrBypyNDeJtEqrFLIzhegGCE3C2AIcartKQUaJz9+6SFpor2bAr wHqV3zm5wsjmvmN9L3k/wEo4bBphhmL9dg4hTeTEChW9/tzAuRy2XQKvD JigvcE2eGLizaJsBZW+WYnQiXIAV61wbhxPmDSl3+KJC3TUSM9CGwanDd g==; X-CSE-ConnectionGUID: oprZXTfPRlueHWV3Yyyxtg== X-CSE-MsgGUID: UceEPdHHSBGAQREApATYew== X-IronPort-AV: E=McAfee;i="6600,9927,11053"; a="20898266" X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="20898266" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 10:22:19 -0700 X-CSE-ConnectionGUID: w7mCtatXRLWlZOakw9eLkg== X-CSE-MsgGUID: iMjDsOr7TGGBt8XsjZZ7wg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="55410232" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa002.jf.intel.com with ESMTP; 23 Apr 2024 10:22:11 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 9ACD5489; Tue, 23 Apr 2024 20:22:10 +0300 (EEST) From: Andy Shevchenko To: Manivannan Sadhasivam , Frank Li , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Andy Shevchenko , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Vignesh Raghavendra , Siddharth Vadapalli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Yue Wang , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Xiaowei Song , Binghui Wang , Thierry Reding , Jonathan Hunter , Thomas Petazzoni , =?utf-8?q?Pali_Roh=C3=A1r?= Subject: [PATCH v2 3/4] PCI: imx6: Convert to agnostic GPIO API Date: Tue, 23 Apr 2024 20:19:06 +0300 Message-ID: <20240423172208.2723892-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240423172208.2723892-1-andriy.shevchenko@linux.intel.com> References: <20240423172208.2723892-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The of_gpio.h is going to be removed. In preparation of that convert the driver to the agnostic API. Signed-off-by: Andy Shevchenko Reviewed-by: Frank Li Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pci-imx6.c | 37 ++++++++++----------------- 1 file changed, 14 insertions(+), 23 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 917c69edee1d..d620f1e1a43c 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -11,14 +11,13 @@ #include #include #include -#include +#include #include #include #include #include #include #include -#include #include #include #include @@ -107,7 +106,7 @@ struct imx6_pcie_drvdata { struct imx6_pcie { struct dw_pcie *pci; - int reset_gpio; + struct gpio_desc *reset_gpiod; bool gpio_active_high; bool link_is_up; struct clk_bulk_data clks[IMX6_PCIE_MAX_CLKS]; @@ -721,9 +720,8 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) } /* Some boards don't have PCIe reset GPIO. */ - if (gpio_is_valid(imx6_pcie->reset_gpio)) - gpio_set_value_cansleep(imx6_pcie->reset_gpio, - imx6_pcie->gpio_active_high); + gpiod_set_raw_value_cansleep(imx6_pcie->reset_gpiod, + imx6_pcie->gpio_active_high); } static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) @@ -771,10 +769,10 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) } /* Some boards don't have PCIe reset GPIO. */ - if (gpio_is_valid(imx6_pcie->reset_gpio)) { + if (imx6_pcie->reset_gpiod) { msleep(100); - gpio_set_value_cansleep(imx6_pcie->reset_gpio, - !imx6_pcie->gpio_active_high); + gpiod_set_raw_value_cansleep(imx6_pcie->reset_gpiod, + !imx6_pcie->gpio_active_high); /* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */ msleep(100); } @@ -1285,22 +1283,15 @@ static int imx6_pcie_probe(struct platform_device *pdev) return PTR_ERR(pci->dbi_base); /* Fetch GPIOs */ - imx6_pcie->reset_gpio = of_get_named_gpio(node, "reset-gpio", 0); imx6_pcie->gpio_active_high = of_property_read_bool(node, "reset-gpio-active-high"); - if (gpio_is_valid(imx6_pcie->reset_gpio)) { - ret = devm_gpio_request_one(dev, imx6_pcie->reset_gpio, - imx6_pcie->gpio_active_high ? - GPIOF_OUT_INIT_HIGH : - GPIOF_OUT_INIT_LOW, - "PCIe reset"); - if (ret) { - dev_err(dev, "unable to get reset gpio\n"); - return ret; - } - } else if (imx6_pcie->reset_gpio == -EPROBE_DEFER) { - return imx6_pcie->reset_gpio; - } + imx6_pcie->reset_gpiod = + devm_gpiod_get_optional(dev, "reset", + imx6_pcie->gpio_active_high ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW); + if (IS_ERR(imx6_pcie->reset_gpiod)) + return dev_err_probe(dev, PTR_ERR(imx6_pcie->reset_gpiod), + "unable to get reset gpio\n"); + gpiod_set_consumer_name(imx6_pcie->reset_gpiod, "PCIe reset"); if (imx6_pcie->drvdata->clks_cnt >= IMX6_PCIE_MAX_CLKS) return dev_err_probe(dev, -ENOMEM, "clks_cnt is too big\n");