diff mbox series

[05/13] clk: qcom: gpucc-sa8775p: Park RCG's clk source at XO during disable

Message ID 20240531090249.10293-6-quic_tdas@quicinc.com (mailing list archive)
State Superseded
Headers show
Series Add support for SA8775P Multimedia clock controllers | expand

Commit Message

Taniya Das May 31, 2024, 9:02 a.m. UTC
The RCG's clk src has to be parked at XO while disabling as per the
HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
Also gpu_cc_cb_clk is recommended to be kept always ON, hence use
clk_branch2_aon_ops to keep the clock always ON.

Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
 drivers/clk/qcom/gpucc-sa8775p.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Konrad Dybcio May 31, 2024, 1:23 p.m. UTC | #1
On 31.05.2024 11:02 AM, Taniya Das wrote:
> The RCG's clk src has to be parked at XO while disabling as per the
> HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
> Also gpu_cc_cb_clk is recommended to be kept always ON, hence use
> clk_branch2_aon_ops to keep the clock always ON.
> 
> Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p")
> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> ---

Should the same fixes apply to 8350?

Konrad
Taniya Das June 10, 2024, 9:11 a.m. UTC | #2
On 5/31/2024 6:53 PM, Konrad Dybcio wrote:
> On 31.05.2024 11:02 AM, Taniya Das wrote:
>> The RCG's clk src has to be parked at XO while disabling as per the
>> HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
>> Also gpu_cc_cb_clk is recommended to be kept always ON, hence use
>> clk_branch2_aon_ops to keep the clock always ON.
>>
>> Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p")
>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>> ---
> 
> Should the same fixes apply to 8350?
> 

Yes Konrad, it is applicable for 8350 as well.

> Konrad
Dmitry Baryshkov June 10, 2024, 6:14 p.m. UTC | #3
On Mon, Jun 10, 2024 at 02:41:10PM +0530, Taniya Das wrote:
> 
> 
> On 5/31/2024 6:53 PM, Konrad Dybcio wrote:
> > On 31.05.2024 11:02 AM, Taniya Das wrote:
> > > The RCG's clk src has to be parked at XO while disabling as per the
> > > HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
> > > Also gpu_cc_cb_clk is recommended to be kept always ON, hence use
> > > clk_branch2_aon_ops to keep the clock always ON.
> > > 
> > > Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p")
> > > Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> > > ---
> > 
> > Should the same fixes apply to 8350?
> > 
> 
> Yes Konrad, it is applicable for 8350 as well.

Can we please get the corresponding patches (as a separate patchset)?
Taniya Das June 12, 2024, 10:30 a.m. UTC | #4
On 6/10/2024 11:44 PM, Dmitry Baryshkov wrote:
> On Mon, Jun 10, 2024 at 02:41:10PM +0530, Taniya Das wrote:
>>
>>
>> On 5/31/2024 6:53 PM, Konrad Dybcio wrote:
>>> On 31.05.2024 11:02 AM, Taniya Das wrote:
>>>> The RCG's clk src has to be parked at XO while disabling as per the
>>>> HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
>>>> Also gpu_cc_cb_clk is recommended to be kept always ON, hence use
>>>> clk_branch2_aon_ops to keep the clock always ON.
>>>>
>>>> Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p")
>>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>>> ---
>>>
>>> Should the same fixes apply to 8350?
>>>
>>
>> Yes Konrad, it is applicable for 8350 as well.
> 
> Can we please get the corresponding patches (as a separate patchset)?
> 
I will send the patch for 8350.
Dmitry Baryshkov June 12, 2024, 10:47 a.m. UTC | #5
On Wed, Jun 12, 2024 at 04:00:47PM +0530, Taniya Das wrote:
> 
> 
> On 6/10/2024 11:44 PM, Dmitry Baryshkov wrote:
> > On Mon, Jun 10, 2024 at 02:41:10PM +0530, Taniya Das wrote:
> > > 
> > > 
> > > On 5/31/2024 6:53 PM, Konrad Dybcio wrote:
> > > > On 31.05.2024 11:02 AM, Taniya Das wrote:
> > > > > The RCG's clk src has to be parked at XO while disabling as per the
> > > > > HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
> > > > > Also gpu_cc_cb_clk is recommended to be kept always ON, hence use
> > > > > clk_branch2_aon_ops to keep the clock always ON.
> > > > > 
> > > > > Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p")
> > > > > Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> > > > > ---
> > > > 
> > > > Should the same fixes apply to 8350?
> > > > 
> > > 
> > > Yes Konrad, it is applicable for 8350 as well.
> > 
> > Can we please get the corresponding patches (as a separate patchset)?
> > 
> I will send the patch for 8350.

Sounds great!
Taniya Das June 21, 2024, 12:06 p.m. UTC | #6
On 6/10/2024 11:44 PM, Dmitry Baryshkov wrote:
> On Mon, Jun 10, 2024 at 02:41:10PM +0530, Taniya Das wrote:
>>
>>
>> On 5/31/2024 6:53 PM, Konrad Dybcio wrote:
>>> On 31.05.2024 11:02 AM, Taniya Das wrote:
>>>> The RCG's clk src has to be parked at XO while disabling as per the
>>>> HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
>>>> Also gpu_cc_cb_clk is recommended to be kept always ON, hence use
>>>> clk_branch2_aon_ops to keep the clock always ON.
>>>>
>>>> Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p")
>>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>>> ---
>>>
>>> Should the same fixes apply to 8350?
>>>
>>
>> Yes Konrad, it is applicable for 8350 as well.
> 
> Can we please get the corresponding patches (as a separate patchset)?
> 

Please find the patch.

https://lore.kernel.org/lkml/20240621-sm8350-gpucc-fixes-v1-1-22db60c7c5d3@quicinc.com/T/#u
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gpucc-sa8775p.c b/drivers/clk/qcom/gpucc-sa8775p.c
index f965babf4330..1f7a02a7503d 100644
--- a/drivers/clk/qcom/gpucc-sa8775p.c
+++ b/drivers/clk/qcom/gpucc-sa8775p.c
@@ -161,7 +161,7 @@  static struct clk_rcg2 gpu_cc_ff_clk_src = {
 		.name = "gpu_cc_ff_clk_src",
 		.parent_data = gpu_cc_parent_data_0,
 		.num_parents = ARRAY_SIZE(gpu_cc_parent_data_0),
-		.ops = &clk_rcg2_ops,
+		.ops = &clk_rcg2_shared_ops,
 	},
 };
 
@@ -181,7 +181,7 @@  static struct clk_rcg2 gpu_cc_gmu_clk_src = {
 		.parent_data = gpu_cc_parent_data_1,
 		.num_parents = ARRAY_SIZE(gpu_cc_parent_data_1),
 		.flags = CLK_SET_RATE_PARENT,
-		.ops = &clk_rcg2_ops,
+		.ops = &clk_rcg2_shared_ops,
 	},
 };
 
@@ -200,7 +200,7 @@  static struct clk_rcg2 gpu_cc_hub_clk_src = {
 		.name = "gpu_cc_hub_clk_src",
 		.parent_data = gpu_cc_parent_data_2,
 		.num_parents = ARRAY_SIZE(gpu_cc_parent_data_2),
-		.ops = &clk_rcg2_ops,
+		.ops = &clk_rcg2_shared_ops,
 	},
 };
 
@@ -294,7 +294,7 @@  static struct clk_branch gpu_cc_cb_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(const struct clk_init_data){
 			.name = "gpu_cc_cb_clk",
-			.ops = &clk_branch2_ops,
+			.ops = &clk_branch2_aon_ops,
 		},
 	},
 };