From patchwork Sat Jun 1 11:53:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raymond Hackley X-Patchwork-Id: 13682364 Received: from mail-4319.protonmail.ch (mail-4319.protonmail.ch [185.70.43.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 440DA14F9DD; Sat, 1 Jun 2024 11:54:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717242850; cv=none; b=CsbZCwVOBgASTcNsYJ+3BTgg7jXysMGnFj6ORIQ7yB6/82R87pXOm/Qitb8IcCD/ndtNiuM+d0mFB6I7qs+0JNvDuHBWmtydfkQixAMpsQDwo+a9lY0yRwSYOWhAInE6Lw8GgrTgKzz8RkDsP2dv54LsA6ZrnPVFh27wLbbQ72o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717242850; c=relaxed/simple; bh=rTGNR1gjpqxgwEbWGFTcY+0ou57HsU3yOk3rGq/T+XQ=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=T+CWzkuPdsU2p/OQ/7Pt1VTN2/nCmlnskzBGEwOM2ajQs5bl2pyhXJ+9jk957fvv+iT37yZVJnNcL4HvuOieIyXvCrtB+5Q8EXg/Wx3BOzcL16usF8j7Tc0PhhHsdMPYpmxUd0/E01xNBAtx2nuxp6071OSPRERRQYOJs79hIz0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b=DUcjn+J5; arc=none smtp.client-ip=185.70.43.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="DUcjn+J5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1717242841; x=1717502041; bh=ZQZES2BbNvBUeOffC7dAFTAqf4ZRcVbqy7kUlYlzRxU=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=DUcjn+J5bQOBpjzJPFGbK93HK4b50ocPdOIVe+MusH+LuPmCJCgaigQ5FBeZWIpdA F7zzQY57BSZ/+vSQfzJEvFij47CP5AtE7q/WGyeqIvMhTrnRl2moOxgtddnymFgb4c Ckud5tH8LTR970qlCotng7fgS1xOmdRGKb8Ka2WEBkQ/f7aBeIDfCWdVPD4jVyOEPc jBrb0N/sthOuiKduH8lAW9G21Op0mxBHnDFA407j5JrQZH6a5QNWyhZStE3wgOoNUf cgSIP5ua6apXFTjaRLMdtGpaunqCrC/v1aspx3lPxQxBk/IZ/CMASVys161GAEwrHi pBdAeK+1N8y1A== Date: Sat, 01 Jun 2024 11:53:57 +0000 To: linux-kernel@vger.kernel.org From: Raymond Hackley Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Siddharth Manthan , Stephan Gerhold , Nikita Travkin , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Joe Mason Subject: [PATCH 1/3] arm64: dts: qcom: msm8916-samsung-gprimeltecan: Add NFC Message-ID: <20240601115321.25314-2-raymondhackley@protonmail.com> In-Reply-To: <20240601115321.25314-1-raymondhackley@protonmail.com> References: <20240601115321.25314-1-raymondhackley@protonmail.com> Feedback-ID: 49437091:user:proton X-Pm-Message-ID: fcf6c71ce66daa31f8cf29645cd200c4b361e6b1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Joe Mason The Samsung Galaxy Grand Prime CAN has a Samsung S3FWRN5 NFC chip that works quite well with the s3fwrn5 driver in the Linux NFC subsystem. The clock setup for the NFC chip is a bit special (although this seems to be a common approach used for Qualcomm devices with NFC): The NFC chip has an output GPIO that is asserted whenever the clock is needed to function properly. On the A3/A5 this is wired up to PM8916 GPIO2, which is then configured with a special function (NFC_CLK_REQ or BB_CLK2_REQ). Enabling the rpmcc RPM_SMD_BB_CLK2_PIN clock will then instruct PM8916 to automatically enable the clock whenever the NFC chip requests it. The advantage is that the clock is only enabled when needed and we don't need to manage it ourselves from the NFC driver. Signed-off-by: Joe Mason [Stephan: Put NFC pinctrl into common dtsi to share it with other variants] Signed-off-by: Stephan Gerhold [Raymond: Use interrupts-extended. Keep &blsp_i2c6 enabled by default] Signed-off-by: Raymond Hackley --- .../qcom/msm8916-samsung-fortuna-common.dtsi | 38 +++++++++++++++++++ .../dts/qcom/msm8916-samsung-gprimeltecan.dts | 17 +++++++++ 2 files changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi index 4f05cae68b37..4cc83b64e256 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include / { aliases { @@ -227,6 +228,10 @@ touchscreen: touchscreen@20 { }; }; +&blsp_i2c6 { + status = "okay"; +}; + &blsp_uart2 { status = "okay"; }; @@ -346,6 +351,29 @@ muic_int_default: muic-int-default-state { bias-disable; }; + nfc_default: nfc-default-state { + irq-pins { + pins = "gpio21"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + nfc-pins { + pins = "gpio20", "gpio49"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + }; + + nfc_i2c_default: nfc-i2c-default-state { + pins = "gpio0", "gpio1"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + sdc2_cd_default: sdc2-cd-default-state { pins = "gpio38"; function = "gpio"; @@ -367,3 +395,13 @@ tsp_int_default: tsp-int-default-state { bias-disable; }; }; + +&pm8916_gpios { + nfc_clk_req: nfc-clk-req-state { + pins = "gpio2"; + function = "func1"; + power-source = ; + bias-disable; + input-enable; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-gprimeltecan.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-gprimeltecan.dts index 4dc74e8bf1d8..7ac86fd3c703 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-gprimeltecan.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-gprimeltecan.dts @@ -29,6 +29,23 @@ &bosch_magn { status = "okay"; }; +&blsp_i2c6 { + nfc@27 { + compatible = "samsung,s3fwrn5-i2c"; + reg = <0x27>; + + interrupts-extended = <&tlmm 21 IRQ_TYPE_EDGE_RISING>; + + en-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>; + wake-gpios = <&tlmm 49 GPIO_ACTIVE_HIGH>; + + clocks = <&rpmcc RPM_SMD_BB_CLK2_PIN>; + + pinctrl-0 = <&nfc_default>, <&nfc_clk_req>; + pinctrl-names = "default"; + }; +}; + &mpss_mem { /* Firmware for gprimeltecan needs more space */ reg = <0x0 0x86800000 0x0 0x5400000>;