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Wed, 05 Jun 2024 01:10:08 -0700 (PDT) Received: from [127.0.1.1] ([110.93.11.116]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-421581490e5sm11025585e9.34.2024.06.05.01.10.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 01:10:07 -0700 (PDT) From: Krzysztof Kozlowski Date: Wed, 05 Jun 2024 10:09:32 +0200 Subject: [PATCH v2 05/16] dt-bindings: clock: qcom,dispcc-sm8x50: reference qcom,gcc.yaml Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240605-dt-bindings-qcom-gcc-v2-5-f947b24f1283@linaro.org> References: <20240605-dt-bindings-qcom-gcc-v2-0-f947b24f1283@linaro.org> In-Reply-To: <20240605-dt-bindings-qcom-gcc-v2-0-f947b24f1283@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Konrad Dybcio , Jonathan Marek , Del Regno , Loic Poulain , Dmitry Baryshkov , Neil Armstrong , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Just like most of Qualcomm clock controllers, we can reference common qcom,gcc.yaml schema to unify the common parts of the binding. Reviewed-by: Dmitry Baryshkov Reviewed-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml index 0d82521a5433..53a5ab319159 100644 --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml @@ -60,18 +60,6 @@ properties: - const: dptx2_phy_pll_link_clk - const: dptx2_phy_pll_vco_div_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - power-domains: description: A phandle and PM domain specifier for the MMCX power domain. @@ -84,14 +72,12 @@ properties: required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - '#power-domain-cells' allOf: + - $ref: qcom,gcc.yaml# - if: not: properties: @@ -105,7 +91,7 @@ allOf: clock-names: maxItems: 7 -additionalProperties: false +unevaluatedProperties: false examples: - |