From patchwork Tue Jun 18 14:56:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 13702482 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 703422139C1; Tue, 18 Jun 2024 14:56:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718722586; cv=none; b=mB2d6Bx9pQrzXfkRf2B9EI0krQve+6zFDKSlrVX1zp63CLMVSuMa0qqjYpFdy4/IBm3eR3h65GwtWyw/JgkDYBiOEh8QaZ2vFpxwJI4cpn0l9FGwL761S1FC/f+Lt2hzDYTYsP5tpKNqgVVBfgqy0NEsK6GwQNDi+fk917tsx9o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718722586; c=relaxed/simple; bh=/G7aYAjJfz5esJECXj7TGvYoyHFsFfl5DtIN5yyBbl0=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=QqQ7to8gUHKwe+kBZAftulRQJQhnt77lKSJExdI/jsAML6fBenuHdwvBQ4iQhYE024oKF8X3JB+P4f83ogN5f9m8dzpO+VWHW29/+0pTBnremDkWf3P5eUztmHV/RNEiVC9ozRNvVQMqaXKJ3CeDO6m5N5U1iCBl4oy2twKU2HY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=V4Jvl+v2; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="V4Jvl+v2" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45IArGNV001468; Tue, 18 Jun 2024 14:56:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=qcppdkim1; bh=SVczHfBCNJUcbXkgsUYcJc bhzbnqr3vPV3s0+WgGHgQ=; b=V4Jvl+v2Z/CNU8/Qt+7ZN20JkoOShxyug4QSTz 9jDQZ7+ch1cBaR+WA7Qy73Z8P9zInEqh+Ez3AmmeZ1BgZSlU+OIcdoqLNLOXwX9m ku9poTe82YfYAedmb46qwpaHMB+yeoxEBjMknE1D1lYkyO0DS1tz7n0VxUQ+49Z6 ml7TSQRFC1BOYabCaCSdHOkUdc/xsqI9xess2SoJu/552N1IVQqe5sbr8ANTF1NJ R93yRSobWmUhsO2sJQiMRLNg3kDC1xCw3jh82SBbj2Mm3KYaJaY0s+WpDZIcpQGG 5fEkIPDa45QmgT0+gT11v9PIg5hcqAytMoF3kkhrVr2DguDQ== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3yu1b0sqba-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Jun 2024 14:56:21 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 45IEuKfl020355 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Jun 2024 14:56:20 GMT Received: from hu-sibis-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 18 Jun 2024 07:56:16 -0700 From: Sibi Sankar To: , , , , CC: , , , , , , , Subject: [PATCH V2] arm64: dts: qcom: x1e80100: Add fastrpc nodes Date: Tue, 18 Jun 2024 20:26:01 +0530 Message-ID: <20240618145601.239101-1-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: pGy36TGHNS-trGutGi3B9U8isTPoIYo9 X-Proofpoint-ORIG-GUID: pGy36TGHNS-trGutGi3B9U8isTPoIYo9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-18_02,2024-06-17_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 malwarescore=0 suspectscore=0 bulkscore=0 spamscore=0 mlxlogscore=711 impostorscore=0 adultscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406180112 Add fastrpc nodes for ADSP and CDSP on X1E80100 SoC. Signed-off-by: Sibi Sankar --- v2: * Rebase on top of next-20240617. * Separate it from the bwmon series. [Bjorn] arch/arm64/boot/dts/qcom/x1e80100.dtsi | 156 +++++++++++++++++++++++++ 1 file changed, 156 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 9944c654851e..dadca06e0e32 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -5368,6 +5368,55 @@ IPCC_MPROC_SIGNAL_GLINK_QMP label = "lpass"; qcom,remote-pid = <2>; + fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "adsp"; + qcom,non-secure-domain; + #address-cells = <1>; + #size-cells = <0>; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x1003 0x80>, + <&apps_smmu 0x1063 0x0>; + dma-coherent; + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x1004 0x80>, + <&apps_smmu 0x1064 0x0>; + dma-coherent; + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x1005 0x80>, + <&apps_smmu 0x1065 0x0>; + dma-coherent; + }; + + compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x1006 0x80>, + <&apps_smmu 0x1066 0x0>; + dma-coherent; + }; + + compute-cb@7 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x1007 0x80>, + <&apps_smmu 0x1067 0x0>; + dma-coherent; + }; + }; + gpr { compatible = "qcom,gpr"; qcom,glink-channels = "adsp_apps"; @@ -5457,6 +5506,113 @@ IPCC_MPROC_SIGNAL_GLINK_QMP label = "cdsp"; qcom,remote-pid = <5>; + + fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "cdsp"; + qcom,non-secure-domain; + #address-cells = <1>; + #size-cells = <0>; + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_smmu 0x0c01 0x20>, + <&apps_smmu 0x0c21 0x20>; + dma-coherent; + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_smmu 0x0c02 0x20>, + <&apps_smmu 0x0c22 0x20>; + dma-coherent; + }; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x0c03 0x20>, + <&apps_smmu 0x0c23 0x20>; + dma-coherent; + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x0c04 0x20>, + <&apps_smmu 0x0c24 0x20>; + dma-coherent; + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x0c05 0x20>, + <&apps_smmu 0x0c25 0x20>; + dma-coherent; + }; + + compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x0c06 0x20>, + <&apps_smmu 0x0c26 0x20>; + dma-coherent; + }; + + compute-cb@7 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x0c07 0x20>, + <&apps_smmu 0x0c27 0x20>; + dma-coherent; + }; + + compute-cb@8 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + iommus = <&apps_smmu 0x0c08 0x20>, + <&apps_smmu 0x0c28 0x20>; + dma-coherent; + }; + + /* note: compute-cb@9 is secure */ + + compute-cb@10 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <10>; + iommus = <&apps_smmu 0x0c0c 0x20>, + <&apps_smmu 0x0c2c 0x20>; + dma-coherent; + }; + + compute-cb@11 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <11>; + iommus = <&apps_smmu 0x0c0d 0x20>, + <&apps_smmu 0x0c2d 0x20>; + dma-coherent; + }; + + compute-cb@12 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <12>; + iommus = <&apps_smmu 0x0c0e 0x20>, + <&apps_smmu 0x0c2e 0x20>; + dma-coherent; + }; + + compute-cb@13 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <13>; + iommus = <&apps_smmu 0x0c0f 0x20>, + <&apps_smmu 0x0c2f 0x20>; + dma-coherent; + }; + }; }; }; };