diff mbox series

arm64: dts: qcom: sm6115: add resets for sdhc_1

Message ID 20240624120849.2550621-2-caleb.connolly@linaro.org (mailing list archive)
State Queued
Headers show
Series arm64: dts: qcom: sm6115: add resets for sdhc_1 | expand

Commit Message

Caleb Connolly June 24, 2024, 12:08 p.m. UTC
These are documented and supported everywhere, but not described in DT.
Add them.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
---
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Alexey Klimov <alexey.klimov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 ++
 1 file changed, 2 insertions(+)

Comments

Dmitry Baryshkov June 24, 2024, 12:14 p.m. UTC | #1
On Mon, 24 Jun 2024 at 15:09, Caleb Connolly <caleb.connolly@linaro.org> wrote:
>
> These are documented and supported everywhere, but not described in DT.
> Add them.
>
> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
> ---
> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Cc: Alexey Klimov <alexey.klimov@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio June 24, 2024, 2:03 p.m. UTC | #2
On 6/24/24 14:08, Caleb Connolly wrote:
> These are documented and supported everywhere, but not described in DT.
> Add them.
> 
> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Bjorn Andersson June 26, 2024, 4:30 a.m. UTC | #3
On Mon, 24 Jun 2024 14:08:36 +0200, Caleb Connolly wrote:
> These are documented and supported everywhere, but not described in DT.
> Add them.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sm6115: add resets for sdhc_1
      commit: 66d83a42f2a3f545c347a9612e9af39cc3804e9d

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 21fbc9f15938..48ccd6fa8a11 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -1087,8 +1087,10 @@  sdhc_1: mmc@4744000 {
 				 <&rpmcc RPM_SMD_XO_CLK_SRC>,
 				 <&gcc GCC_SDCC1_ICE_CORE_CLK>;
 			clock-names = "iface", "core", "xo", "ice";
 
+			resets = <&gcc GCC_SDCC1_BCR>;
+
 			power-domains = <&rpmpd SM6115_VDDCX>;
 			operating-points-v2 = <&sdhc1_opp_table>;
 			iommus = <&apps_smmu 0x00c0 0x0>;
 			interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG