Message ID | 20240626143302.810632-3-quic_devipriy@quicinc.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show
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Wed, 26 Jun 2024 14:33:08 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTP id 45QEX4g6025819; Wed, 26 Jun 2024 14:33:04 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 3ywqpkv29b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 26 Jun 2024 14:33:03 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 45QEUh9i024000; Wed, 26 Jun 2024 14:33:03 GMT Received: from hu-devc-blr-u22-a.qualcomm.com (hu-devipriy-blr.qualcomm.com [10.131.37.37]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 45QEX36U025792 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 26 Jun 2024 14:33:03 +0000 Received: by hu-devc-blr-u22-a.qualcomm.com (Postfix, from userid 4059087) id 87CE341027; Wed, 26 Jun 2024 20:03:02 +0530 (+0530) From: Devi Priya <quic_devipriy@quicinc.com> To: andersson@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, catalin.marinas@arm.com, will@kernel.org, p.zabel@pengutronix.de, richardcochran@gmail.com, geert+renesas@glider.be, dmitry.baryshkov@linaro.org, neil.armstrong@linaro.org, arnd@arndb.de, m.szyprowski@samsung.com, nfraprado@collabora.com, u-kumar1@ti.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org Cc: quic_devipriy@quicinc.com Subject: [PATCH V5 2/7] dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX Date: Wed, 26 Jun 2024 20:02:57 +0530 Message-Id: <20240626143302.810632-3-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240626143302.810632-1-quic_devipriy@quicinc.com> References: <20240626143302.810632-1-quic_devipriy@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: _hmG-WJQE2dtnTm9EtO5s0GO4p-LEJsv X-Proofpoint-GUID: _hmG-WJQE2dtnTm9EtO5s0GO4p-LEJsv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-26_07,2024-06-25_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 spamscore=0 bulkscore=0 phishscore=0 malwarescore=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 priorityscore=1501 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406260107 |
Series |
Add NSS clock controller support for IPQ9574
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expand
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diff --git a/include/dt-bindings/clock/qcom,ipq9574-gcc.h b/include/dt-bindings/clock/qcom,ipq9574-gcc.h index 52123c5a09fa..05ef3074c9da 100644 --- a/include/dt-bindings/clock/qcom,ipq9574-gcc.h +++ b/include/dt-bindings/clock/qcom,ipq9574-gcc.h @@ -220,4 +220,5 @@ #define GCC_PCIE1_PIPE_CLK 211 #define GCC_PCIE2_PIPE_CLK 212 #define GCC_PCIE3_PIPE_CLK 213 +#define GPLL0_OUT_AUX 214 #endif