diff mbox series

[08/12] arm64: dts: qcom: x1e80100-vivobook-s15: fix missing PCIe4 gpios

Message ID 20240722095459.27437-9-johan+linaro@kernel.org (mailing list archive)
State Accepted
Commit 4a8e704c50d3abb6c04848fd869aa6701dc8ba81
Headers show
Series arm64: dts: qcom: x1e80100: QCP/Vivobook/Yoga PCIe fixes | expand

Commit Message

Johan Hovold July 22, 2024, 9:54 a.m. UTC
Add the missing PCIe4 perst, wake and clkreq GPIOs and pin config.

Fixes: d0e2f8f62dff ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
 .../dts/qcom/x1e80100-asus-vivobook-s15.dts   | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)

Comments

Konrad Dybcio July 22, 2024, 10:03 a.m. UTC | #1
On 22.07.2024 11:54 AM, Johan Hovold wrote:
> Add the missing PCIe4 perst, wake and clkreq GPIOs and pin config.
> 
> Fixes: d0e2f8f62dff ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15")
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
index 1eb0abcbf650..9caa14dda585 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
@@ -430,6 +430,12 @@  &mdss_dp3_phy {
 };
 
 &pcie4 {
+	perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
+	pinctrl-0 = <&pcie4_default>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };
 
@@ -524,6 +530,29 @@  nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
+	pcie4_default: pcie4-default-state {
+		clkreq-n-pins {
+			pins = "gpio147";
+			function = "pcie4_clk";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-n-pins {
+			pins = "gpio146";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-disable;
+		};
+
+		wake-n-pins {
+			pins = "gpio148";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+
 	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";