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Tue, 30 Jul 2024 11:58:42 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 40msykdx6s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 30 Jul 2024 11:58:42 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 46UBwfuC001321; Tue, 30 Jul 2024 11:58:42 GMT Received: from hu-devc-blr-u22-a.qualcomm.com (hu-mdalam-blr.qualcomm.com [10.131.36.157]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 46UBwg42001391 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 30 Jul 2024 11:58:42 +0000 Received: by hu-devc-blr-u22-a.qualcomm.com (Postfix, from userid 466583) id C53A9412FA; Tue, 30 Jul 2024 17:28:40 +0530 (+0530) From: Md Sadre Alam To: axboe@kernel.dk, agk@redhat.com, snitzer@kernel.org, mpatocka@redhat.com, adrian.hunter@intel.com, quic_asutoshd@quicinc.com, ritesh.list@gmail.com, ulf.hansson@linaro.org, andersson@kernel.org, konrad.dybcio@linaro.org, linux-block@vger.kernel.org, linux-kernel@vger.kernel.org, dm-devel@lists.linux.dev, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_viswanat@quicinc.com, quic_srichara@quicinc.com, quic_varada@quicinc.com Cc: quic_mdalam@quicinc.com Subject: [PATCH 5/6] mmc: cqhci: Add additional algo mode for inline encryption Date: Tue, 30 Jul 2024 17:28:37 +0530 Message-Id: <20240730115838.3507302-6-quic_mdalam@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240730115838.3507302-1-quic_mdalam@quicinc.com> References: <20240730115838.3507302-1-quic_mdalam@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: lhw4OAtwyQ-gQmxP64ImHtlgUz1rjCFQ X-Proofpoint-ORIG-GUID: lhw4OAtwyQ-gQmxP64ImHtlgUz1rjCFQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-30_11,2024-07-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 clxscore=1015 spamscore=0 mlxscore=0 bulkscore=0 suspectscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407300084 Add support for AES-XTS-256, AES-CBC-128 and AES-CBC-256 in cqhci_crypto_algs for inline encryption. Signed-off-by: Md Sadre Alam --- drivers/mmc/host/cqhci-crypto.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mmc/host/cqhci-crypto.c b/drivers/mmc/host/cqhci-crypto.c index d5f4b6972f63..85ab7bb87886 100644 --- a/drivers/mmc/host/cqhci-crypto.c +++ b/drivers/mmc/host/cqhci-crypto.c @@ -16,10 +16,22 @@ static const struct cqhci_crypto_alg_entry { enum cqhci_crypto_alg alg; enum cqhci_crypto_key_size key_size; } cqhci_crypto_algs[BLK_ENCRYPTION_MODE_MAX] = { + [BLK_ENCRYPTION_MODE_AES_128_XTS] = { + .alg = CQHCI_CRYPTO_ALG_AES_XTS, + .key_size = CQHCI_CRYPTO_KEY_SIZE_128, + }, [BLK_ENCRYPTION_MODE_AES_256_XTS] = { .alg = CQHCI_CRYPTO_ALG_AES_XTS, .key_size = CQHCI_CRYPTO_KEY_SIZE_256, }, + [BLK_ENCRYPTION_MODE_AES_128_CBC] = { + .alg = CQHCI_CRYPTO_ALG_BITLOCKER_AES_CBC, + .key_size = CQHCI_CRYPTO_KEY_SIZE_128, + }, + [BLK_ENCRYPTION_MODE_AES_256_CBC] = { + .alg = CQHCI_CRYPTO_ALG_BITLOCKER_AES_CBC, + .key_size = CQHCI_CRYPTO_KEY_SIZE_256, + }, }; static inline struct cqhci_host *