From patchwork Wed Jul 31 06:18:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748119 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E54BF16D326; Wed, 31 Jul 2024 06:19:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406772; cv=none; b=EFHpWQnZMrymQPAZJpi9Pj15Bi75XZTWUP7qZ3fxEWj/oI1We7dBNvs0bPYt6s0VCTJ8HCUrMVEGm4Ds4+z0uIwkLt5mFLZ2F5k63RZGFl5aeEeid6JcRVK7Q9mqkp4PjUEAgyrcfhgFwEnXz/YrCfksYTUDOht7wieoy7SmxEA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406772; c=relaxed/simple; bh=HGhNmscTLllRNAlkAcLvWKGyOF1yadzzxps8Ao8tcUs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dRtUXFdQCfUdbxbw6K1/mkjZsWyTTWfDgrJP/fuc24YvpS6xRSBQQov32/1OH9sdTg4iZmIBvYG4nWMJ/SxFgHJ9fmr++zgkkVLq/QgWIalU9PmzpFXvmZl1r77EHh8OhYSRflY39eTewwRVPomY7oGGmeVq33oQWaViYRFtUFQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=Cf08uzeF; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="Cf08uzeF" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WYhl624HCz9wV5; Wed, 31 Jul 2024 06:19:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406770; bh=HGhNmscTLllRNAlkAcLvWKGyOF1yadzzxps8Ao8tcUs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Cf08uzeFLGmBhRKVShibWKCepMM76iSIAKXV+P+EnBQFevXjwQ++iu7PvqdRP2SfV Da+coEu8unUxL91HO4rV96ujyDR8OMUOMsOwQGJi4o+1iOW4GkQs/TMPMKVRDywcUo wUXsJAXPfWSIk6dFJl1BRk7bUXavhKJELQDhuv1E= X-Riseup-User-ID: 654E9151BF075245306FD3DA83F94EE879C727E99A8CA6AC86C0C910F6BCF921 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhl33nbpzJrXc; Wed, 31 Jul 2024 06:19:27 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:44 +0700 Subject: [PATCH v3 03/11] arm64: dts: qcom: sm6115-pro1x: Add Goodix Touchscreen Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-3-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The Fxtec Pro1X touchscreen uses Goodix GT9286 chip. Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 49 +++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 47e446249af6..813cd22907c8 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -63,6 +63,20 @@ key-volume-up { wakeup-source; }; }; + + ts_vdd_supply: ts-vdd-supply { + compatible = "regulator-fixed"; + regulator-name = "ts_vdd_supply"; + gpio = <&pca9534 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + ts_vddio_supply: ts-vddio-supply { + compatible = "regulator-fixed"; + regulator-name = "ts_vddio_supply"; + gpio = <&pca9534 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &dispcc { @@ -87,6 +101,27 @@ pca9534: gpio@21 { }; }; +&i2c2 { + status = "okay"; + /* Clock frequency was not specified downstream, let's park it to 100 KHz */ + clock-frequency = <100000>; + + touchscreen@14 { + compatible = "goodix,gt9286"; + reg = <0x14>; + + interrupts-extended = <&tlmm 80 IRQ_TYPE_LEVEL_LOW>; + + irq-gpios = <&tlmm 80 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&tlmm 71 GPIO_ACTIVE_HIGH>; + AVDD28-supply = <&ts_vdd_supply>; + VDDIO-supply = <&ts_vddio_supply>; + + pinctrl-0 = <&ts_int_n>, <&ts_rst_n>; + pinctrl-names = "default"; + }; +}; + &pm6125_gpios { vol_up_n: vol-up-n-state { pins = "gpio5"; @@ -257,6 +292,20 @@ key_camera_n: key-camera-n-state { bias-pull-up; }; + ts_rst_n: ts-rst-n-state { + pins = "gpio71"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + ts_int_n: ts-int-n-state { + pins = "gpio80"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + hall_sensor_n: hall-sensor-n-state { pins = "gpio96"; function = "gpio";