| Message ID | 20240902104302.3959670-1-quic_tingguoc@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: qcom: sa8775p: pmic: enable rtc | expand |
On 02/09/2024 12:43, Tingguo Cheng wrote: > Add RTC node, the RTC is controlled by PMIC device via spmi bus. > > Signed-off-by: Tingguo Cheng <quic_tingguoc@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi > index 1369c3d43f86..47d05b897d5a 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi We achieved consensus allowing sa8775p to stay, but now Qualcomm changes point of view and insists on new approach of dropping sa8775p. Therefore this change does not make much sense in the new approach. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi index 1369c3d43f86..47d05b897d5a 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi @@ -132,6 +132,14 @@ pmm8654au_0_pon_resin: resin { }; }; + pmm8654au_0_rtc: rtc@6100 { + compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + allow-set-time; + }; + pmm8654au_0_gpios: gpio@8800 { compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; reg = <0x8800>;
Add RTC node, the RTC is controlled by PMIC device via spmi bus. Signed-off-by: Tingguo Cheng <quic_tingguoc@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)