diff mbox series

[V3] clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val()

Message ID 20240906113905.641336-1-quic_skakitap@quicinc.com (mailing list archive)
State Accepted
Headers show
Series [V3] clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val() | expand

Commit Message

Satya Priya Kakitapalli Sept. 6, 2024, 11:39 a.m. UTC
In zonda_pll_adjust_l_val() replace the divide operator with comparison
operator to fix below build error and smatch warning.

drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate':
clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod'

smatch warnings:
drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: replace
divide condition '(remainder * 2) / prate' with '(remainder * 2) >= prate'

Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL")
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
---
 drivers/clk/qcom/clk-alpha-pll.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

Comments

Vladimir Zapolskiy Sept. 6, 2024, 12:46 p.m. UTC | #1
Hi Satya Priya,

On 9/6/24 14:39, Satya Priya Kakitapalli wrote:
> In zonda_pll_adjust_l_val() replace the divide operator with comparison
> operator to fix below build error and smatch warning.
> 
> drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate':
> clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod'
> 
> smatch warnings:
> drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: replace
> divide condition '(remainder * 2) / prate' with '(remainder * 2) >= prate'
> 
> Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL")
> Reported-by: Jon Hunter <jonathanh@nvidia.com>
> Reported-by: kernel test robot <lkp@intel.com>
> Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
> Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/
> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>

thank you for the updates.

Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>

> ---
>   drivers/clk/qcom/clk-alpha-pll.c | 4 +---
>   1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index 019713c38f25..f9105443d7db 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -2176,10 +2176,8 @@ static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32
>   
>   	quotient = rate;
>   	remainder = do_div(quotient, prate);
> -	*l = quotient;
>   
> -	if ((remainder * 2) / prate)
> -		*l = *l + 1;
> +	*l = rate + (u32)(remainder * 2 >= prate);
>   }
>   
>   static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate,

--
Best wishes,
Vladimir
Jon Hunter Sept. 6, 2024, 2:14 p.m. UTC | #2
On 06/09/2024 12:39, Satya Priya Kakitapalli wrote:
> In zonda_pll_adjust_l_val() replace the divide operator with comparison
> operator to fix below build error and smatch warning.
> 
> drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate':
> clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod'
> 
> smatch warnings:
> drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: replace
> divide condition '(remainder * 2) / prate' with '(remainder * 2) >= prate'
> 
> Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL")
> Reported-by: Jon Hunter <jonathanh@nvidia.com>
> Reported-by: kernel test robot <lkp@intel.com>
> Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
> Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/
> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
> ---
>   drivers/clk/qcom/clk-alpha-pll.c | 4 +---
>   1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index 019713c38f25..f9105443d7db 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -2176,10 +2176,8 @@ static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32
>   
>   	quotient = rate;
>   	remainder = do_div(quotient, prate);
> -	*l = quotient;
>   
> -	if ((remainder * 2) / prate)
> -		*l = *l + 1;
> +	*l = rate + (u32)(remainder * 2 >= prate);
>   }
>   
>   static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate,


Tested-by: Jon Hunter <jonathanh@nvidia.com>

Thanks!
Jon
Jon Hunter Sept. 9, 2024, 10:57 a.m. UTC | #3
On 06/09/2024 15:14, Jon Hunter wrote:
> 
> On 06/09/2024 12:39, Satya Priya Kakitapalli wrote:
>> In zonda_pll_adjust_l_val() replace the divide operator with comparison
>> operator to fix below build error and smatch warning.
>>
>> drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate':
>> clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod'
>>
>> smatch warnings:
>> drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: 
>> replace
>> divide condition '(remainder * 2) / prate' with '(remainder * 2) >= 
>> prate'
>>
>> Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for 
>> Zonda PLL")
>> Reported-by: Jon Hunter <jonathanh@nvidia.com>
>> Reported-by: kernel test robot <lkp@intel.com>
>> Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
>> Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/
>> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
>> ---
>>   drivers/clk/qcom/clk-alpha-pll.c | 4 +---
>>   1 file changed, 1 insertion(+), 3 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/clk-alpha-pll.c 
>> b/drivers/clk/qcom/clk-alpha-pll.c
>> index 019713c38f25..f9105443d7db 100644
>> --- a/drivers/clk/qcom/clk-alpha-pll.c
>> +++ b/drivers/clk/qcom/clk-alpha-pll.c
>> @@ -2176,10 +2176,8 @@ static void zonda_pll_adjust_l_val(unsigned 
>> long rate, unsigned long prate, u32
>>       quotient = rate;
>>       remainder = do_div(quotient, prate);
>> -    *l = quotient;
>> -    if ((remainder * 2) / prate)
>> -        *l = *l + 1;
>> +    *l = rate + (u32)(remainder * 2 >= prate);
>>   }
>>   static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long 
>> rate,
> 
> 
> Tested-by: Jon Hunter <jonathanh@nvidia.com>


Looks like this has now landed in the mainline. Can we see if we can get 
this into v6.11?

Thanks!
Jon
Stephen Boyd Sept. 9, 2024, 9:08 p.m. UTC | #4
Quoting Jon Hunter (2024-09-09 03:57:09)
> 
> On 06/09/2024 15:14, Jon Hunter wrote:
> > 
> > On 06/09/2024 12:39, Satya Priya Kakitapalli wrote:
> >> In zonda_pll_adjust_l_val() replace the divide operator with comparison
> >> operator to fix below build error and smatch warning.
> >>
> >> drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate':
> >> clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod'
> >>
> >> smatch warnings:
> >> drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: 
> >> replace
> >> divide condition '(remainder * 2) / prate' with '(remainder * 2) >= 
> >> prate'
> >>
> >> Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for 
> >> Zonda PLL")
> >> Reported-by: Jon Hunter <jonathanh@nvidia.com>
> >> Reported-by: kernel test robot <lkp@intel.com>
> >> Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
> >> Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/
> >> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
> >> ---
> >>   drivers/clk/qcom/clk-alpha-pll.c | 4 +---
> >>   1 file changed, 1 insertion(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/clk/qcom/clk-alpha-pll.c 
> >> b/drivers/clk/qcom/clk-alpha-pll.c
> >> index 019713c38f25..f9105443d7db 100644
> >> --- a/drivers/clk/qcom/clk-alpha-pll.c
> >> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> >> @@ -2176,10 +2176,8 @@ static void zonda_pll_adjust_l_val(unsigned 
> >> long rate, unsigned long prate, u32
> >>       quotient = rate;
> >>       remainder = do_div(quotient, prate);
> >> -    *l = quotient;
> >> -    if ((remainder * 2) / prate)
> >> -        *l = *l + 1;
> >> +    *l = rate + (u32)(remainder * 2 >= prate);
> >>   }
> >>   static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long 
> >> rate,
> > 
> > 
> > Tested-by: Jon Hunter <jonathanh@nvidia.com>
> 
> 
> Looks like this has now landed in the mainline. Can we see if we can get 
> this into v6.11?
> 
 
Applied to clk-fixes. Was it too hard to keep the if statement and just
change to a comparison?

	if (remainder * 2 >= prate)
		*l = *l + 1;
diff mbox series

Patch

diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 019713c38f25..f9105443d7db 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -2176,10 +2176,8 @@  static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32
 
 	quotient = rate;
 	remainder = do_div(quotient, prate);
-	*l = quotient;
 
-	if ((remainder * 2) / prate)
-		*l = *l + 1;
+	*l = rate + (u32)(remainder * 2 >= prate);
 }
 
 static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate,