| Message ID | 20240923072827.3772504-5-vladimir.zapolskiy@linaro.org (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | media: dt-bindings: media: camss: Fix interrupt types | expand |
On Mon, Sep 23, 2024 at 10:28:25AM GMT, Vladimir Zapolskiy wrote: > The expected type of all CAMSS interrupts is edge rising, fix it in > the CAMSS device tree node for sc8280xp platform. > Why did we get all these interrupts wrong? Why should they be RISING and not LEVEL_HIGH? Please document the reason why this is changed, so that the next person adding a camss node can find your explanation and understand why it should look this way. Regards, Bjorn > Fixes: 5994dd60753e ("arm64: dts: qcom: sc8280xp: camss: Add CAMSS block definition") > Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> > Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > Tested-by: Johan Hovold <johan+linaro@kernel.org> > --- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 +++++++++++++------------- > 1 file changed, 20 insertions(+), 20 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index 80a57aa22839..aa2678eb3bcd 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -3882,26 +3882,26 @@ camss: camss@ac5a000 { > "vfe3", > "csid3"; > > - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 758 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 759 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 760 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 761 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 762 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 764 IRQ_TYPE_EDGE_RISING>; > interrupt-names = "csid1_lite", > "vfe_lite1", > "csiphy3", > -- > 2.45.2 >
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 80a57aa22839..aa2678eb3bcd 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3882,26 +3882,26 @@ camss: camss@ac5a000 { "vfe3", "csid3"; - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 758 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 759 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 760 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 761 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 762 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 764 IRQ_TYPE_EDGE_RISING>; interrupt-names = "csid1_lite", "vfe_lite1", "csiphy3",
The expected type of all CAMSS interrupts is edge rising, fix it in the CAMSS device tree node for sc8280xp platform. Fixes: 5994dd60753e ("arm64: dts: qcom: sc8280xp: camss: Add CAMSS block definition") Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Tested-by: Johan Hovold <johan+linaro@kernel.org> --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 +++++++++++++------------- 1 file changed, 20 insertions(+), 20 deletions(-)