| Message ID | 20240924100602.3813725-7-vladimir.zapolskiy@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 959176141ee6a2ff25b801bdd42a1333ea7bd70d |
| Headers | show |
| Series | arm64: dts: qcom: enable dispcc controllers by default | expand |
On 24/09/2024 12:05, Vladimir Zapolskiy wrote: > Enable display clock controller for all Qualcomm SM8650 powered boards > by default. > > Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi > index 01ac3769ffa6..173e092b15e2 100644 > --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi > @@ -3841,8 +3841,6 @@ dispcc: clock-controller@af00000 { > #clock-cells = <1>; > #reset-cells = <1>; > #power-domain-cells = <1>; > - > - status = "disabled"; > }; > > usb_1_hsphy: phy@88e3000 { Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 01ac3769ffa6..173e092b15e2 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -3841,8 +3841,6 @@ dispcc: clock-controller@af00000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - - status = "disabled"; }; usb_1_hsphy: phy@88e3000 {
Enable display clock controller for all Qualcomm SM8650 powered boards by default. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 -- 1 file changed, 2 deletions(-)