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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5389fd5e333sm259724e87.76.2024.09.27.03.32.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2024 03:32:17 -0700 (PDT) From: Vladimir Zapolskiy To: Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Jagadeesh Kona Cc: Michael Turquette , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: clock: qcom,sm8450-camcc: do not restrict power domain to MMCX Date: Fri, 27 Sep 2024 13:32:11 +0300 Message-ID: <20240927103212.4154273-3-vladimir.zapolskiy@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240927103212.4154273-1-vladimir.zapolskiy@linaro.org> References: <20240927103212.4154273-1-vladimir.zapolskiy@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 It was unveiled that Qualcomm SM8550 Camera clock controller is attached to MXC power domain, therefore it has to be reflected and generalized in the device tree bindings description. Signed-off-by: Vladimir Zapolskiy --- .../devicetree/bindings/clock/qcom,sm8450-camcc.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml index 26afbbe65511..9ef967523987 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml @@ -40,12 +40,12 @@ properties: power-domains: maxItems: 1 description: - A phandle and PM domain specifier for the MMCX power domain. + A phandle and PM domain specifier for the supplying power domain. required-opps: maxItems: 1 description: - A phandle to an OPP node describing required MMCX performance point. + A phandle to an OPP node describing the power domain's performance point. reg: maxItems: 1