diff mbox series

qcom: ice: Remove ice probe

Message ID 20240928050456.27577-1-quic_spuppala@quicinc.com (mailing list archive)
State New
Headers show
Series qcom: ice: Remove ice probe | expand

Commit Message

Seshu Madhavi Puppala Sept. 28, 2024, 5:04 a.m. UTC
Under JEDEC specification ICE IP is tightly
coupled with Storage. Qualcomm vendor HW
implementation also ties the clock and power
supply for ICE to corresponding storage clock and
supplies. For a SoC supporting multiple storage
types like UFS and eMMC the ICE physical address
space is not shared and is always part of
corresponding storage physical address space
hence there is no need to independently probe ICE.

Cleanup commit 2afbf43a4aec ("soc: qcom: Make
the Qualcomm UFS/SDCC ICE a dedicated driver")
to remove dedicated ICE probe since there is no
dedicated ICE IP block shared between UFS and
SDCC as mentioned in 2afbf43a4aec.

Storage probe will check for the corresponding
ICE node by using of_qcom_ice_get to get ICE
instance. Additional support added to
of_qcom_ice_get to support ICE instance creation
with new approach. Backward compatibility with
old style device tree approach is untouched.

Signed-off-by: Seshu Madhavi Puppala <quic_spuppala@quicinc.com>
---
 drivers/soc/qcom/ice.c | 44 +++++++-----------------------------------
 1 file changed, 7 insertions(+), 37 deletions(-)
diff mbox series

Patch

diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c
index fbab7fe5c652..47f1b668dc86 100644
--- a/drivers/soc/qcom/ice.c
+++ b/drivers/soc/qcom/ice.c
@@ -303,7 +303,13 @@  struct qcom_ice *of_qcom_ice_get(struct device *dev)
 		goto out;
 	}
 
-	ice = platform_get_drvdata(pdev);
+	base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(base)) {
+		dev_warn(&pdev->dev, "ICE registers not found\n");
+		return PTR_ERR(base);
+	}
+
+	ice = qcom_ice_create(&pdev->dev, base);
 	if (!ice) {
 		dev_err(dev, "Cannot get ice instance from %s\n",
 			dev_name(&pdev->dev));
@@ -328,41 +334,5 @@  struct qcom_ice *of_qcom_ice_get(struct device *dev)
 }
 EXPORT_SYMBOL_GPL(of_qcom_ice_get);
 
-static int qcom_ice_probe(struct platform_device *pdev)
-{
-	struct qcom_ice *engine;
-	void __iomem *base;
-
-	base = devm_platform_ioremap_resource(pdev, 0);
-	if (IS_ERR(base)) {
-		dev_warn(&pdev->dev, "ICE registers not found\n");
-		return PTR_ERR(base);
-	}
-
-	engine = qcom_ice_create(&pdev->dev, base);
-	if (IS_ERR(engine))
-		return PTR_ERR(engine);
-
-	platform_set_drvdata(pdev, engine);
-
-	return 0;
-}
-
-static const struct of_device_id qcom_ice_of_match_table[] = {
-	{ .compatible = "qcom,inline-crypto-engine" },
-	{ },
-};
-MODULE_DEVICE_TABLE(of, qcom_ice_of_match_table);
-
-static struct platform_driver qcom_ice_driver = {
-	.probe	= qcom_ice_probe,
-	.driver = {
-		.name = "qcom-ice",
-		.of_match_table = qcom_ice_of_match_table,
-	},
-};
-
-module_platform_driver(qcom_ice_driver);
-
 MODULE_DESCRIPTION("Qualcomm Inline Crypto Engine driver");
 MODULE_LICENSE("GPL");