Message ID | 20241005064307.18972-3-quic_rdwivedi@quicinc.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Add support for multiple ICE algorithms | expand |
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 9d9bbb9aca64..56a7ca6a3af4 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2590,6 +2590,25 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, #reset-cells = <1>; status = "disabled"; + + ice_cfg: ice-config { + alg1 { + alg-name = "alg1"; + rx-alloc-percent = <60>; + status = "disabled"; + }; + + alg2 { + alg-name = "alg2"; + status = "disabled"; + }; + + alg3 { + alg-name = "alg3"; + num-core = <28 28 15 13>; + status = "ok"; + }; + }; }; ice: crypto@1d88000 {