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AJvYcCWKm4xUr6Qvyt5y8+675wpV3uCQ4uLsyjihB6EIkGxwSoiiHjcxum8DYRLiMZL9zYRkJebKDzw9ykciLxXn@vger.kernel.org X-Gm-Message-State: AOJu0YyxrXsqjzkZMzV18p9s1CrqCX4Tf/C9taRTpfw3jMQl5OlFuGBL 0j0e+lDGYvWW7OW2XyGNWRbGC+wmoc1ZauZ/U636yQIEZTdcE1Q3y8GB3T2pXx0= X-Google-Smtp-Source: AGHT+IEsD5yXDxfUzoFybsXIoglRfcxdQJaSnddDjdvvdYbQFhGwxOX6rfJqovbrZKbUlTb+tgHFTg== X-Received: by 2002:a05:600c:1547:b0:431:5e3c:2ff0 with SMTP id 5b1f17b1804b1-4316163c947mr3908555e9.8.1729220100333; Thu, 17 Oct 2024 19:55:00 -0700 (PDT) Received: from localhost.localdomain ([2.125.184.148]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ecf0ed599sm596135f8f.69.2024.10.17.19.54.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2024 19:54:59 -0700 (PDT) From: Alexey Klimov To: linux-sound@vger.kernel.org, srinivas.kandagatla@linaro.org, broonie@kernel.org Cc: lgirdwood@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org, perex@perex.cz, tiwai@suse.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, krzysztof.kozlowski@linaro.org, caleb.connolly@linaro.org, linux-kernel@vger.kernel.org, a39.skl@gmail.com Subject: [PATCH v3 3/5] arm64: dts: qcom: sm6115: add LPASS LPI pin controller Date: Fri, 18 Oct 2024 03:54:49 +0100 Message-ID: <20241018025452.1362293-4-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241018025452.1362293-1-alexey.klimov@linaro.org> References: <20241018025452.1362293-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the Low Power Audio SubSystem Low Power Island (LPASS LPI) pin controller device node required for audio subsystem on Qualcomm QRB4210 RB2. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index b211a49982d6..4fc6978d105b 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -16,6 +16,7 @@ #include #include #include +#include #include / { @@ -810,6 +811,20 @@ data-pins { }; }; + lpass_tlmm: pinctrl@a7c0000 { + compatible = "qcom,sm6115-lpass-lpi-pinctrl"; + reg = <0x0 0x0a7c0000 0x0 0x20000>, + <0x0 0x0a950000 0x0 0x10000>; + + clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "audio"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpass_tlmm 0 0 19>; + + }; + gcc: clock-controller@1400000 { compatible = "qcom,gcc-sm6115"; reg = <0x0 0x01400000 0x0 0x1f0000>;