From patchwork Fri Oct 25 03:07:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qingqing Zhou X-Patchwork-Id: 13849966 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F67D18C02B; Fri, 25 Oct 2024 03:08:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729825713; cv=none; b=dTt1fi210Zqwg0Ao9GugJceGp0dawJYgkhDWufkmJJdF07JXg1zaOQnrUN7tXMWXiaP5X+sYXrbr/0MC4KLabZss7y8eCEcH+Drx5GjgsNs4v/ARy6HCKvJ4++TT19Ir2FKmoVZ+h0xDTexzdV1Zwvi+0mbjLzWDj7IY6SCJasg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729825713; c=relaxed/simple; bh=xBVhLS8ccudZR83SIWr5rtlTCezJLDL18/V/SgcM5Hg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=hpbw05qtsChsNG6ZlMprF9rxa6DQNaFtJt+heJQ3o3IvX5O4D9sAP9EsaUuK+cS9stFKBq+FN9Ig4ak7xUnYwMpXSoXdrD0mI5aUitSoMfqDEcX/Atb4jGBBeKz6z4sCxRBt/DsTwWs45P49Z3c0uiyXqtKVnjrW2C6xbCUpa+s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=bbGmMDkj; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="bbGmMDkj" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49OCdQpd030075; Fri, 25 Oct 2024 03:08:23 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to; s=qcppdkim1; bh=Fl7DnlkeftVt/F/qb/NMKWJj p9u5RdBk1HGzlJ3C2ec=; b=bbGmMDkjN26a7Je8VmP2ymIJt5s4PzuuqB6tdSZx B3TYEjizZKIpUFbX0AA5pkkwt84i5hNj32Omh5nOU3Y9Lq1lgr/qzoA0Y0M5gJ6a 8ykR+FIM4v8Vre0BAzpXgZrm5r2de+1KkGHqCA4+1nhB7z31o1VtA8D6XaVuMqKj NEo9UVVd/JfCTp5B0WoksvZimSHiQ6WfLZUDGO1Rf85SuFf/YyIM4mvKpXt/OtMM f+mLBvuFDCFO4lZ1+gXo45Pzu+1wmsW3LKTvQ0VsHBqGYkdAVnifAY7bD7naXciw yeBzkFxdpM1O+qXwW5JZc+tgKTviqREhdUw7OLsSQybFjA== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 42fdtxkdv2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Oct 2024 03:08:22 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49P38MgW015748 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Oct 2024 03:08:22 GMT Received: from hu-qqzhou-sha.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 24 Oct 2024 20:08:18 -0700 From: Qingqing Zhou To: , , , , , , , , CC: , , , , Qingqing Zhou Subject: [PATCH v3 4/4] arm64: dts: qcom: qcs615: add the APPS SMMU node Date: Fri, 25 Oct 2024 08:37:32 +0530 Message-ID: <20241025030732.29743-5-quic_qqzhou@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241025030732.29743-1-quic_qqzhou@quicinc.com> References: <20241025030732.29743-1-quic_qqzhou@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 7_3LxCE6kgMFMHYtFPnQkkqzS5UniubI X-Proofpoint-ORIG-GUID: 7_3LxCE6kgMFMHYtFPnQkkqzS5UniubI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 mlxlogscore=811 priorityscore=1501 impostorscore=0 bulkscore=0 spamscore=0 malwarescore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410250021 Add the APPS SMMU node for QCS615 platform. Add the dma-ranges to limit DMA address range to 36bit width to align with system architecture. Signed-off-by: Qingqing Zhou --- arch/arm64/boot/dts/qcom/qcs615.dtsi | 74 ++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi index 027c5125f36b..38428e4537b7 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -379,6 +379,7 @@ soc: soc@0 { compatible = "simple-bus"; ranges = <0 0 0 0 0x10 0>; + dma-ranges = <0 0 0 0 0x10 0>; #address-cells = <2>; #size-cells = <2>; @@ -524,6 +525,79 @@ reg = <0x0 0x0c3f0000 0x0 0x400>; }; + apps_smmu: iommu@15000000 { + compatible = "qcom,qcs615-smmu-500", "qcom,smmu-500", "arm,mmu-500"; + reg = <0x0 0x15000000 0x0 0x80000>; + #iommu-cells = <2>; + #global-interrupts = <1>; + + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */