From patchwork Wed Oct 30 09:32:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tao Zhang X-Patchwork-Id: 13856153 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3FBF81E32D7; Wed, 30 Oct 2024 09:33:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730280828; cv=none; b=HFRPk2eSEZtvEHsS2CSlv4ad2sf3b72ojPfQbTpj351QrSO6JLODNBXY82TollzYOiF0qm3EJHCPhmjBqiNxYBC2W8YQtGBYGOHDOamMpdJDNsYEjM4efKRpukAoZ7+BMLlhqk93GQ9ZMfYvf2XISlFrDF0dyjlt0ZHfRu8aFqw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730280828; c=relaxed/simple; bh=xBc+1L6Q/IonCQYUkezY5NPL3xHHBdmVBzv3MRLIHnU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gM3Y+eWbTkYmZiDWixqMb2U/PixqQsCRJoqgrkY45HYKUG1HaOIeaVyl+828HNDxR2qb7rxUWQF14tbFdkHOEHMLHYJnBYEEuAU4gdFSWfIuWP9Res3+RSq+6iOFumJooqFEeV+caYHiTSYHzwNTQoMYTo1/rn+G/b+hfrr654A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=FPc+w9QL; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="FPc+w9QL" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49U0O3bY027014; Wed, 30 Oct 2024 09:33:35 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to; s=qcppdkim1; bh=w3QGRmNgjXIiFwwmNaUFfizy UclQYS0Fh9BYwMiMwvs=; b=FPc+w9QLGvCN9psvyodFhA3qFRPRKVM3NvPA8Zwq Kd//ZiJQFh5ctRZZeNvSf/mjESDI3iVMHHDQTAJydr/awi9snUzArqfySArGngz9 F1RUfsPaW4xoOcxcKscOWeYdRk1oB+ze54RPxseadmHWfIX04mHgP3UU+0U8lruZ NYcqkuKfwpgqpGPkMo3q7qR5fFiPAHCZoCdo1Ga7N0lP8w/S7Scw8Yox8rlCAblJ 4BFs7r4I9kocLEqN6x5pTar8OFz412xLKVGWSam7fx67G9Yr3WIdK5Cby2pd+2Jg yWIigeZBXFlTv2PqCnRgvN+eRHMR0KRZv15FbIjbUwnsUw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 42gqrgubba-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 30 Oct 2024 09:33:35 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49U9XYdb012003 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 30 Oct 2024 09:33:34 GMT Received: from taozha2-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 30 Oct 2024 02:33:30 -0700 From: Tao Zhang To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mathieu Poirier , Leo Yan , Alexander Shishkin CC: Tao Zhang , , , , , Subject: [PATCH v5 4/4] coresight-tpda: Optimize the function of reading element size Date: Wed, 30 Oct 2024 17:32:55 +0800 Message-ID: <20241030093255.26915-5-quic_taozha@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241030093255.26915-1-quic_taozha@quicinc.com> References: <20241030093255.26915-1-quic_taozha@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: evKFG_8ZGWl1LlNBCZIkAkoBRfftFWet X-Proofpoint-GUID: evKFG_8ZGWl1LlNBCZIkAkoBRfftFWet X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 clxscore=1015 impostorscore=0 suspectscore=0 spamscore=0 mlxscore=0 adultscore=0 priorityscore=1501 mlxlogscore=999 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410300074 Since the new funnel device supports multi-port output scenarios, there may be more than one TPDM connected to one TPDA. In this way, when reading the element size of the TPDM, TPDA driver needs to find the expected TPDM corresponding to the filter source. When TPDA finds a TPDM or a filter source from a input connection, it will read the Devicetree to get the expected TPDM's element size. Signed-off-by: Tao Zhang --- drivers/hwtracing/coresight/coresight-tpda.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c index ad023a2a99d1..413828f19d60 100644 --- a/drivers/hwtracing/coresight/coresight-tpda.c +++ b/drivers/hwtracing/coresight/coresight-tpda.c @@ -110,6 +110,16 @@ static int tpda_get_element_size(struct tpda_drvdata *drvdata, csdev->pdata->in_conns[i]->dest_port != inport) continue; + /* + * If this port has a hardcoded filter, use the source + * device directly. + */ + if (csdev->pdata->in_conns[i]->filter_src_fwnode) { + in = csdev->pdata->in_conns[i]->filter_src_dev; + if (!in) + continue; + } + if (coresight_device_is_tpdm(in)) { if (drvdata->dsb_esize || drvdata->cmb_esize) return -EEXIST; @@ -124,7 +134,6 @@ static int tpda_get_element_size(struct tpda_drvdata *drvdata, } } - return rc; }