| Message ID | 20241104073840.3686674-4-quic_varada@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | qcom: ipq5424: Add LLCC/system-cache-controller | expand |
On 4.11.2024 8:38 AM, Varadarajan Narayanan wrote: > Add a DT node for Last level cache (aka. system cache) controller > which provides control over the last level cache present on > IPQ5424 SoCs. > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi index 76af0d87e9a8..497df93acf47 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -137,6 +137,13 @@ soc@0 { #size-cells = <2>; ranges = <0 0 0 0 0x10 0>; + system-cache-controller@800000 { + compatible = "qcom,ipq5424-llcc"; + reg = <0 0x00800000 0 0x200000>; + reg-names = "llcc0_base"; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,ipq5424-tlmm"; reg = <0 0x01000000 0 0x300000>;
Add a DT node for Last level cache (aka. system cache) controller which provides control over the last level cache present on IPQ5424 SoCs. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq5424.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)