From patchwork Tue Nov 19 15:00:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Petrous via B4 Relay X-Patchwork-Id: 13880028 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 565981D095E; Tue, 19 Nov 2024 15:01:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732028465; cv=none; b=Fn94m6S/EVzHkT3/4Lqw60P8w88DW3a7WgAgX3SkeDDhxY0afPcxrNRaVKlbl+9kFUPNe5osYbUoJ60PN17qFNjrucM/tGSFDMsuhYHDuwkaxS4oVgujIcLyu8R6ZHazA4jdYgnFD3sHG6vS48QqzRZe2PG280IVk8s85E4Ho4g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732028465; c=relaxed/simple; bh=OmhoPxBbW2h8GuBsgibA6xugOaiXQl/SNjprceISX24=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kwrRas17gWXDtKokAR+sR+qkECqWxZbra23ioSrXQmyPS+sH+s+MrqFaxr/bABv04zzrh+qARL1LXS4XJECcJLp1/3oXUcfVwnqfKhwUGWIsa679lHpGjd8J/BqCsikxEW2S8WCmWnxIemfZ4hfaFsAfJN6Qw6JNqiOTGjbx00w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RkBYdbFV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RkBYdbFV" Received: by smtp.kernel.org (Postfix) with ESMTPS id 09E8AC4AF10; Tue, 19 Nov 2024 15:01:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1732028465; bh=OmhoPxBbW2h8GuBsgibA6xugOaiXQl/SNjprceISX24=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=RkBYdbFVF2kJFYxglbrq1cixQ8DxB02h/9tzJO4xw43qLqtGTaAGYToVIxtls/tyB a4zej2rsLvWoGx60mvaaGpFj+fGpyMqB8eHWtaT9G8OyqkKkzihGCuiBrArimi3eBZ cNL3zyRDHePyKUG0md4r15EHmaInkFahmQBDNoAfYM/ifD5Z135oqNKAY0v5E/Cu+W gNh27QAXnpGnPCcSvgooMCoWlml31vHDqzH9Eu1/4pkBwZeonM4yza75tCToDFjMHx 4sDmDsFvRAT9Djw2xMRb+YsK70rpbPB2nPxNXWBXtoHn6kPReCEGLTJ1rpauAcFOVz oefMbJJnzwtRw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id F088ED44167; Tue, 19 Nov 2024 15:01:04 +0000 (UTC) From: Jan Petrous via B4 Relay Date: Tue, 19 Nov 2024 16:00:19 +0100 Subject: [PATCH v5 13/16] dt-bindings: net: Add DT bindings for DWMAC on NXP S32G/R SoCs Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241119-upstream_s32cc_gmac-v5-13-7dcc90fcffef@oss.nxp.com> References: <20241119-upstream_s32cc_gmac-v5-0-7dcc90fcffef@oss.nxp.com> In-Reply-To: <20241119-upstream_s32cc_gmac-v5-0-7dcc90fcffef@oss.nxp.com> To: Maxime Coquelin , Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vinod Koul , Richard Cochran , Andrew Lunn , Heiner Kallweit , Russell King , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Emil Renner Berthing , Minda Chen , Nicolas Ferre , Claudiu Beznea , Iyappan Subramanian , Keyur Chudgar , Quan Nguyen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro Cc: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, NXP S32 Linux Team , "Jan Petrous (OSS)" X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732028461; l=4093; i=jan.petrous@oss.nxp.com; s=20240922; h=from:subject:message-id; bh=1xROYlylzwH8UK0iKW6W31OAoU/xH+M2AeMY1t7N71A=; b=egKGCJN7L7SfDPwLAkt0D8PQm2WbSjgetnAwUx7ajU6wFMX7ZykF4MeT4vQGiic4QS3j4HY7g dukyTfF5/bgCfzXADaOQyoGgrz6ag4THqvIlg54jUjvEv7bGItftnQy X-Developer-Key: i=jan.petrous@oss.nxp.com; a=ed25519; pk=Ke3wwK7rb2Me9UQRf6vR8AsfJZfhTyoDaxkUCqmSWYY= X-Endpoint-Received: by B4 Relay for jan.petrous@oss.nxp.com/20240922 with auth_id=217 X-Original-From: "Jan Petrous (OSS)" Reply-To: jan.petrous@oss.nxp.com From: "Jan Petrous (OSS)" Add basic description for DWMAC ethernet IP on NXP S32G2xx, S32G3xx and S32R45 automotive series SoCs. Signed-off-by: Jan Petrous (OSS) Reviewed-by: Rob Herring (Arm) --- .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 105 +++++++++++++++++++++ .../devicetree/bindings/net/snps,dwmac.yaml | 3 + 2 files changed, 108 insertions(+) diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml new file mode 100644 index 000000000000..a141e826a295 --- /dev/null +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2021-2024 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller + +maintainers: + - Jan Petrous (OSS) + +description: + This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs. + The SoC series S32G2xx and S32G3xx feature one DWMAC instance, + the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII + interface over Pinctrl device or the output can be routed + to the embedded SerDes for SGMII connectivity. + +properties: + compatible: + oneOf: + - const: nxp,s32g2-dwmac + - items: + - enum: + - nxp,s32g3-dwmac + - nxp,s32r45-dwmac + - const: nxp,s32g2-dwmac + + reg: + items: + - description: Main GMAC registers + - description: GMAC PHY mode control register + + interrupts: + maxItems: 1 + + interrupt-names: + const: macirq + + clocks: + items: + - description: Main GMAC clock + - description: Transmit clock + - description: Receive clock + - description: PTP reference clock + + clock-names: + items: + - const: stmmaceth + - const: tx + - const: rx + - const: ptp_ref + +required: + - clocks + - clock-names + +allOf: + - $ref: snps,dwmac.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + bus { + #address-cells = <2>; + #size-cells = <2>; + + ethernet@4033c000 { + compatible = "nxp,s32g2-dwmac"; + reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */ + <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */ + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "macirq"; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>; + clock-names = "stmmaceth", "tx", "rx", "ptp_ref"; + phy-mode = "rgmii-id"; + phy-handle = <&phy0>; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <5>; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <5>; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 4e2ba1bf788c..a88d1c236eaf 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -66,6 +66,9 @@ properties: - ingenic,x2000-mac - loongson,ls2k-dwmac - loongson,ls7a-dwmac + - nxp,s32g2-dwmac + - nxp,s32g3-dwmac + - nxp,s32r-dwmac - qcom,qcs404-ethqos - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos