From patchwork Fri Nov 22 07:49:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qingqing Zhou X-Patchwork-Id: 13882856 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53B2B1779A5; Fri, 22 Nov 2024 07:49:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732261797; cv=none; b=hPrWNd4ZTa41HKAuOloBl55chiFBaCwSgdkbFArQS7YozHYhwLsTOLOwoER1nXHmaS+lXwpmN1Y+oEyeNKQbxJnvFmzkQSRvBCstZdKyg5Kh99/9bqH730ARg+HD+rdEw7aOsUTPdeao/yNwu85enl4ke+b+bIO9gCbut6IGYqI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732261797; c=relaxed/simple; bh=kP0nnpyx/2kHmSB3m5WcG3HL7NmZu1M84rTy6tRKStY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ibhL3x7jrWYjVHOLLKhZ2UAhT5MuaVbBZTLK/7p92FSfpYP0uc+gs15PaX7WwoZRBMd+1xmLOPxp7ScXBuNDcnmklP6lh0NsU5Gmdkq62RQojJ4iWvwSf2IUrNHk9V+VA0DmCG98hm3OoC+YAAjgNkeNaHHu7Pztvqz4QB8rK1A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=YIljGbZ8; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="YIljGbZ8" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AM6HwOm007297; Fri, 22 Nov 2024 07:49:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to; s=qcppdkim1; bh=naFfZHFIT5pITKGnnqftZ+93 xsjCFRMa0Yk7FqjTOFk=; b=YIljGbZ8o6CCODOg/zzQ+w1QfafIaLsy7Iwk0w+R 8cClbe9fv5j8vPvmP+xzylOeqAmzof/JPftdSWvqXR10bcoFsrsPK0qSyqXIEdkc 4/wtLT/xeKXVedtVdtiqKHEyWUVZeqVoxvsgXhG/Kitp6Jevejb2WE0ETly9CaLZ f/+JPs27I8fvQEBwSvksVwSifRp+x6XK1HnwT7wY0XVRy5zzqf+wHPywAGjcsHUK +uyS8nbYipBnqNNCZnDLbogHJfu0kZ0O5m3wajVTnEzfOhPrR1FgxNZ00Y+uAPgW DEWcpP9ilif0F6X9c4vBEnpsm/HnLqa5qAxgfiHCz/fpEQ== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 432mjh86s7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Nov 2024 07:49:47 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AM7nkxw002604 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Nov 2024 07:49:46 GMT Received: from hu-qqzhou-sha.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 21 Nov 2024 23:49:42 -0800 From: Qingqing Zhou To: , , , , , , , , CC: , , , , Qingqing Zhou Subject: [PATCH 1/2] dt-bindings: arm-smmu: document QCS615 GPU SMMU Date: Fri, 22 Nov 2024 13:19:21 +0530 Message-ID: <20241122074922.28153-2-quic_qqzhou@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241122074922.28153-1-quic_qqzhou@quicinc.com> References: <20241122074922.28153-1-quic_qqzhou@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: oIcNV4K5bbrPFwFMTlPUTZjvWUCYXCfR X-Proofpoint-ORIG-GUID: oIcNV4K5bbrPFwFMTlPUTZjvWUCYXCfR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=999 priorityscore=1501 bulkscore=0 clxscore=1015 phishscore=0 adultscore=0 impostorscore=0 mlxscore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411220064 Add the compatible for Qualcomm QCS615 GPU SMMU. Add the compatible in the list of 3 clocks required by the GPU SMMU. Remove the compatible from the "no clocks" list. Signed-off-by: Qingqing Zhou --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index c1e11bc6b7a0..c179ad1b4097 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -88,6 +88,7 @@ properties: items: - enum: - qcom,qcm2290-smmu-500 + - qcom,qcs615-smmu-500 - qcom,sa8255p-smmu-500 - qcom,sa8775p-smmu-500 - qcom,sar2130p-smmu-500 @@ -474,6 +475,7 @@ allOf: items: - enum: - qcom,qcm2290-smmu-500 + - qcom,qcs615-smmu-500 - qcom,sm6115-smmu-500 - qcom,sm6125-smmu-500 - const: qcom,adreno-smmu @@ -559,7 +561,6 @@ allOf: - cavium,smmu-v2 - marvell,ap806-smmu-500 - nvidia,smmu-500 - - qcom,qcs615-smmu-500 - qcom,qcs8300-smmu-500 - qcom,qdu1000-smmu-500 - qcom,sa8255p-smmu-500