@@ -35,6 +35,18 @@ sleep_clk: sleep-clk {
clock-frequency = <32000>;
};
};
+
+ dp0-connector {
+ compatible = "dp-connector";
+ label = "DP0";
+ type = "full-size";
+
+ port {
+ dp0_connector_in: endpoint {
+ remote-endpoint = <&mdss_dp0_out>;
+ };
+ };
+ };
};
&apps_rsc {
@@ -223,6 +235,30 @@ &gcc {
<0>;
};
+&mdss {
+ status = "okay";
+};
+
+&mdss_dp0 {
+ status = "okay";
+
+ pinctrl-0 = <&dp_hot_plug_det>;
+ pinctrl-names = "default";
+};
+
+&mdss_dp0_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+ remote-endpoint = <&dp0_connector_in>;
+};
+
+&mdss_dp0_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l5a>;
+ vdda-pll-supply = <&vreg_l4a>;
+};
+
&qupv3_id_0 {
status = "okay";
};
@@ -247,6 +283,14 @@ &rpmhcc {
clock-names = "xo";
};
+&tlmm {
+ dp_hot_plug_det: dp-hot-plug-det-state {
+ pins = "gpio94";
+ function = "edp0_hot";
+ bias-disable;
+ };
+};
+
&uart7 {
status = "okay";
};
Enable DPTX0 along with their corresponding PHYs for qcs8300-ride platform. Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 44 +++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+)