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Fri, 29 Nov 2024 14:44:11 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 43384m8h8x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Nov 2024 14:44:10 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4ATEi3GV028668; Fri, 29 Nov 2024 14:44:10 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-msavaliy-hyd.qualcomm.com [10.213.110.207]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 4ATEiA0H028745 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Nov 2024 14:44:10 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 429934) id A4170240E9; Fri, 29 Nov 2024 20:14:09 +0530 (+0530) From: Mukesh Kumar Savaliya To: konrad.dybcio@linaro.org, andersson@kernel.org, andi.shyti@kernel.org, linux-arm-msm@vger.kernel.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, conor+dt@kernel.org, agross@kernel.org, devicetree@vger.kernel.org, vkoul@kernel.org, linux@treblig.org, dan.carpenter@linaro.org, Frank.Li@nxp.com, konradybcio@kernel.org, bryan.odonoghue@linaro.org, krzk+dt@kernel.org, robh@kernel.org Cc: quic_vdadhani@quicinc.com, Mukesh Kumar Savaliya Subject: [PATCH v5 1/4] dt-bindindgs: i2c: qcom,i2c-geni: Document shared flag Date: Fri, 29 Nov 2024 20:13:54 +0530 Message-Id: <20241129144357.2008465-2-quic_msavaliy@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241129144357.2008465-1-quic_msavaliy@quicinc.com> References: <20241129144357.2008465-1-quic_msavaliy@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: hxdXg0jVhNM7qigSCcz_KfmVSaLUVO_S X-Proofpoint-ORIG-GUID: hxdXg0jVhNM7qigSCcz_KfmVSaLUVO_S X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 mlxlogscore=999 clxscore=1015 adultscore=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 spamscore=0 impostorscore=0 bulkscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2411290119 Adds qcom,shared-se flag usage. Use this flag when I2C serial controller needs to be shared in multiprocessor system(APPS,Modem,ADSP) environment. SE(Serial Engine HW controller acting as protocol master controller) is an I2C controller. Basically a programmable SERDES(serializer/deserializer) coupled with data DMA entity, capable in handling a bus protocol, and data moves to/from system memory. Two clients from different processors can share an I2C controller for same slave device OR their owned slave devices. Assume I2C Slave EEPROM device connected with I2C controller. Each client from ADSP SS and APPS Linux SS can perform i2c transactions. Transfer gets serialized by Lock TRE + DMA xfer + Unlock TRE at HW level. Signed-off-by: Mukesh Kumar Savaliya --- .../devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml index 9f66a3bb1f80..88682a333399 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml @@ -60,6 +60,14 @@ properties: power-domains: maxItems: 1 + qcom,shared-se: + description: True if I2C controller is shared between two or more system processors. + SE(Serial Engine HW controller working as protocol master controller) is an + I2C controller. Basically, a programmable SERDES(serializer/deserializer) + coupled with data DMA entity, capable in handling a bus protocol, and data + moves to/from system memory. + type: boolean + reg: maxItems: 1