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a=openpgp-sha256; l=888; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=o/j8/+TO8OD48smfSUKUdOz/ApCt6Naf9bzdvgRGXWo=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnSm30Q9G1cCTXOPTx2dTJNxkog61JFfnb5hKE1 85pZ2nBxB2JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ0pt9AAKCRCLPIo+Aiko 1eo4B/9Z4HSdH7h5Ma+J+mN8AU7NmBowokudpJz9rVuhxYMWz3xdMQx57sm7THAX9CKFhA7Fdn+ tgvPenMdzkYidciMrmcXw/Z0Qbt5oD+TO2DG4bRbMarDNFeGPBqPIwufwJxUkPrmpQN9xi7LGky /uryff+5Z87MzG0e9RCXzHtjge5nm6GbiVuq671Ut8Lb6KhuNE6DZGkbyiOxBQumNCAyzAlkH0v BxhaKPTitoasm23Dc3gv9R8Rm3psCGAzZFNBI8RG1pLtkvXIIb+TD5RD6PJzjWmhvzokVOB1aoN h33uMTSSSnYyDCYeu+LhdnNltO1XKpfWsvsX0Ao/zzq+a8cP X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The SM4450 platform uses PM4450 to provide sleep clock. According to the documentation, that clock has 32.7645 kHz frequency. Correct the sleep clock definition. Fixes: 7a1fd03e7410 ("arm64: dts: qcom: Adds base SM4450 DTSI") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm4450.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi index a0de5fe16faae5674efb0070d4017983c86603c4..27453771aa68a1c4dbd2a986af6785fa05db147d 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -29,7 +29,7 @@ xo_board: xo-board { sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; };