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Tue, 3 Dec 2024 00:39:21 GMT Received: from abhinavk-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 2 Dec 2024 16:39:21 -0800 From: Abhinav Kumar Date: Mon, 2 Dec 2024 16:39:01 -0800 Subject: [PATCH 2/4] drm/msm/dp: remove redundant ST_DISPLAY_OFF checks in msm_dp_bridge_atomic_enable() Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20241202-hpd_display_off-v1-2-8d0551847753@quicinc.com> References: <20241202-hpd_display_off-v1-0-8d0551847753@quicinc.com> In-Reply-To: <20241202-hpd_display_off-v1-0-8d0551847753@quicinc.com> To: Rob Clark , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , "Simona Vetter" CC: , , , Stephen Boyd , "Doug Anderson" , Johan Hovold , "Bjorn Andersson" , Abhinav Kumar X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1733186360; l=1315; i=quic_abhinavk@quicinc.com; s=20240509; h=from:subject:message-id; bh=Lo+jEu6NU9rKNs+Uk5OmK6M5JhK/oIZ9xIDOah2jISc=; b=cP3XY3IFnRQrDA0sgS+gkSQ0ipJkyloChlhbfx1AJhr9SVCpDt25B+kRFqZvpsAzmk38jR6Se Ah1Xo4PpQn4AfytiUf+kwxYiNnRtVNUcsHL7CnH5Z79DNEiJSo52joK X-Developer-Key: i=quic_abhinavk@quicinc.com; a=ed25519; pk=SD3D8dOKDDh6BoX3jEYjsHrTFwuIK8+o0cLPgQok9ys= X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: UnQ3Ihbn1eGL4UaK8NYdAmc7XIQgpCbu X-Proofpoint-GUID: UnQ3Ihbn1eGL4UaK8NYdAmc7XIQgpCbu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 impostorscore=0 malwarescore=0 adultscore=0 priorityscore=1501 mlxlogscore=960 phishscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412030002 The checks in msm_dp_display_prepare() for making sure that we are in ST_DISPLAY_OFF OR ST_MAINLINK_READY seem redundant. DRM fwk shall not issue any commits if state is not ST_MAINLINK_READY as msm_dp's atomic_check callback returns a failure if state is not ST_MAINLINK_READY. For the ST_DISPLAY_OFF check, its mainly to guard against a scenario that there is an atomic_enable() without a prior atomic_disable() which once again should not really happen. To simplify the code, get rid of these checks. Signed-off-by: Abhinav Kumar --- drivers/gpu/drm/msm/dp/dp_display.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 992184cc17e4..614fff09e5f2 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -1513,12 +1513,6 @@ void msm_dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, return; } - state = msm_dp_display->hpd_state; - if (state != ST_DISPLAY_OFF && state != ST_MAINLINK_READY) { - mutex_unlock(&msm_dp_display->event_mutex); - return; - } - rc = msm_dp_display_set_mode(dp, &msm_dp_display->msm_dp_mode); if (rc) { DRM_ERROR("Failed to perform a mode set, rc=%d\n", rc);