From patchwork Wed Dec 4 11:33:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 13893621 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0DE41B2EEB; Wed, 4 Dec 2024 11:34:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733312084; cv=none; b=uP4zA6X5gOB1OCEbtHBHTD3huY3eTbP8rvt9zPz/MpSkoEI25ztOZUs4Y3dzDPgDIDPGmVpY/pqXdd4/g3boV5RhbXjFbuwiJVFi9V+8Z3/4uuz1dArJ4AW7lyLcQOQNKNc9Z/g/uttLGuOVPTZS3xlYNrWZgBAGQAhCm8FM9qc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733312084; c=relaxed/simple; bh=jiFVso/nwV0y561wfoCj8eR41jJeXr/kyNu26Vrhlew=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gcLgRUM5nzrZ557+wTneSiWv0MbiJAQtSUw7PVEsyNogZelGGU+zgnDr/A69j49nGiy6AHGUOdYMBUgbj9SI9J930OKwAhTymXFuFZphpXg1dbccf5h74362sVAAG2m1RrOyq1poe1SktcRd3zv6+5PL2lB+QBGJX+6peU3q5xI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=SYY0QYPR; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="SYY0QYPR" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4B43pw5P031795; Wed, 4 Dec 2024 11:34:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= bZDJPrd2WlE/jIyVBwF4ZA7OELQJie2as6ktjfnAVok=; b=SYY0QYPRDySJ9TQu DN/DO10btN7FG9Sob5oagQ6vMlBudojY2G5o55oYaOW1O+Mff4vw6RzZiL6GeRXc bLKW0Qhr/5VEmAZssk/YLbRhPLVg5QzAMPRdJc7lOjvmssInCIjnphNjg0/UbkIS wAG5fO1nWKqE7nKtfbCfixCSEn0uoxDc7+8pZgW/TCqI+B23JwtKmX+NXT3jFVJi ixuSBJ0YPmDXFCiwV7dgG0BZYa4n+USCuoOFpx5ebKZSCK+PlikoEkTjEreBtm2x /1oJeohDvhIZyar1IKda0oDip1lbxLnE6HWEZ43g5jFmNuenw7a4tpU1Ztg+8ktH 78aevg== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 439trbmg0d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Dec 2024 11:34:29 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B4BYSvY009408 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Dec 2024 11:34:28 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Dec 2024 03:34:22 -0800 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , CC: Praveenkumar I Subject: [PATCH v2 4/6] pci: qcom: Add support for IPQ5332 Date: Wed, 4 Dec 2024 17:03:27 +0530 Message-ID: <20241204113329.3195627-5-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241204113329.3195627-1-quic_varada@quicinc.com> References: <20241204113329.3195627-1-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: jOUxAZIbAYRwlhz85abuckrebGOR1j31 X-Proofpoint-ORIG-GUID: jOUxAZIbAYRwlhz85abuckrebGOR1j31 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 mlxscore=0 suspectscore=0 spamscore=0 malwarescore=0 adultscore=0 priorityscore=1501 clxscore=1015 phishscore=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412040090 From: Praveenkumar I The Qualcomm IPQ5332 PCIe controller instances are based on SNPS core 5.90a with Gen3 Single-lane and Dual-lane support. The Qualcomm IP can be handled by the 2.9.0 ops, hence using that for IPQ5332. Signed-off-by: Praveenkumar I Signed-off-by: Varadarajan Narayanan --- v2: Removed dependency on [1] 1. https://lore.kernel.org/all/20230519090219.15925-1-quic_devipriy@quicinc.com/ --- drivers/pci/controller/dwc/pcie-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index dc102d8bd58c..68e6f97535db 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1835,6 +1835,7 @@ static const struct of_device_id qcom_pcie_match[] = { { .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 }, { .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 }, + { .compatible = "qcom,pcie-ipq5332", .data = &cfg_2_9_0 }, { .compatible = "qcom,pcie-ipq6018", .data = &cfg_2_9_0 }, { .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 },