Message ID | 20241205-correct_timer_irq-v2-1-7db282a5e475@quicinc.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | [v2] arm64: dts: qcom: sdx75: Correct IRQ number of EL2 non-secure physical timer | expand |
On 12/5/2024 6:28 PM, Cong Zhang wrote: > The INTID of EL2 non-secure physical timer is 26. In linux, the IRQ > number has a fixed 16 offset for PPIs. Therefore, the linux IRQ number > of EL2 non-secure physical timer should be 10 (26 - 16). > Please add a 'Fixed' tag, as it is indeed a fix. > Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi > index 5f7e59ecf1ca6298cb252ee0654bc7eaeefbd303..b0775173278f3eed0f301b40dfba0f2680d7b0d0 100644 > --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi > @@ -1548,6 +1548,6 @@ timer { > interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > - <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; > }; > }; > > --- > base-commit: bcf2acd8f64b0a5783deeeb5fd70c6163ec5acd7 > change-id: 20241205-correct_timer_irq-d7e6fc4c616d > > Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi index 5f7e59ecf1ca6298cb252ee0654bc7eaeefbd303..b0775173278f3eed0f301b40dfba0f2680d7b0d0 100644 --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi @@ -1548,6 +1548,6 @@ timer { interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; }; };
The INTID of EL2 non-secure physical timer is 26. In linux, the IRQ number has a fixed 16 offset for PPIs. Therefore, the linux IRQ number of EL2 non-secure physical timer should be 10 (26 - 16). Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com> --- arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- base-commit: bcf2acd8f64b0a5783deeeb5fd70c6163ec5acd7 change-id: 20241205-correct_timer_irq-d7e6fc4c616d Best regards,