| Message ID | 20241205-dp_mst-v1-39-f8618d42a99a@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | drm/msm/dp: Add MST support for MSM chipsets | expand |
On Thu, Dec 05, 2024 at 08:32:10PM -0800, Abhinav Kumar wrote: > For each MST capable DP controller, initialize a dp_mst module to > manage its DP MST operations. The DP MST module for each controller > is the central entity to manage its topology related operations as > well as interfacing with the rest of the DP driver. > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 6 ++++++ > drivers/gpu/drm/msm/dp/dp_display.c | 12 ++++++++++++ > drivers/gpu/drm/msm/msm_drv.h | 7 +++++++ > 3 files changed, 25 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > index 359de04abf4bbead3daa5e8b357a3c34216e3e65..734d8972bbd65153778d5d70a55ac09dfc693ac9 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > @@ -664,6 +664,12 @@ static int _dpu_kms_initialize_displayport(struct drm_device *dev, > stream_cnt = msm_dp_get_mst_max_stream(priv->dp[i]); > > if (stream_cnt > 1) { > + rc = msm_dp_mst_register(priv->dp[i]); > + if (rc) { > + DPU_ERROR("dp_mst_init failed for DP, rc = %d\n", rc); > + return rc; > + } > + This seems to be put backwards. I'd prefer if DPU driver allocated all MST encoders and then called into the DP driver, letting it handle all MST-related internals. > for (stream_id = 0; stream_id < stream_cnt; stream_id++) { > info.stream_id = stream_id; > encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_DPMST, &info); > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > index eafec9ab4f83cb44e861687e7550748b4d9b7ece..7f2eace17c126e3758c68bb0dee67662463a6e05 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.c > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > @@ -69,6 +69,8 @@ enum { > > #define WAIT_FOR_RESUME_TIMEOUT_JIFFIES (HZ / 2) > > +#define MAX_DPCD_TRANSACTION_BYTES 16 > + > struct msm_dp_event { > u32 event_id; > u32 data; > @@ -1689,6 +1691,16 @@ int msm_dp_modeset_init(struct msm_dp *msm_dp_display, struct drm_device *dev, > return 0; > } > > +int msm_dp_mst_register(struct msm_dp *dp) > +{ > + struct msm_dp_display_private *dp_display; > + > + dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); > + > + return msm_dp_mst_init(dp, dp_display->max_stream, > + MAX_DPCD_TRANSACTION_BYTES, dp_display->aux); This doesn't seem to change between plaforms. Please push it to msm_dp_mst_init() instead. > +} > + > void msm_dp_display_atomic_prepare(struct msm_dp *dp) > { > int rc = 0; > diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h > index 12b50a797772f574122481cd8a1c7c88aacb8250..7ed0e25d6c2bc9e4e3d78895742226d22d103e4c 100644 > --- a/drivers/gpu/drm/msm/msm_drv.h > +++ b/drivers/gpu/drm/msm/msm_drv.h > @@ -376,6 +376,8 @@ int msm_dp_get_mst_max_stream(const struct msm_dp *dp_display); > > int msm_dp_mst_bridge_init(struct msm_dp *dp_display, struct drm_encoder *encoder); > > +int msm_dp_mst_register(struct msm_dp *dp_display); > + > #else > static inline int __init msm_dp_register(void) > { > @@ -397,6 +399,11 @@ static inline int msm_dp_get_mst_max_stream(struct msm_dp *dp_display) > return -EINVAL; > } > > +static inline int msm_dp_mst_register(struct msm_dp *dp_display) > +{ > + return -EINVAL; > +} > + > int msm_dp_mst_bridge_init(struct msm_dp *dp_display, struct drm_encoder *encoder) > { > return -EINVAL; > > -- > 2.34.1 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 359de04abf4bbead3daa5e8b357a3c34216e3e65..734d8972bbd65153778d5d70a55ac09dfc693ac9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -664,6 +664,12 @@ static int _dpu_kms_initialize_displayport(struct drm_device *dev, stream_cnt = msm_dp_get_mst_max_stream(priv->dp[i]); if (stream_cnt > 1) { + rc = msm_dp_mst_register(priv->dp[i]); + if (rc) { + DPU_ERROR("dp_mst_init failed for DP, rc = %d\n", rc); + return rc; + } + for (stream_id = 0; stream_id < stream_cnt; stream_id++) { info.stream_id = stream_id; encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_DPMST, &info); diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index eafec9ab4f83cb44e861687e7550748b4d9b7ece..7f2eace17c126e3758c68bb0dee67662463a6e05 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -69,6 +69,8 @@ enum { #define WAIT_FOR_RESUME_TIMEOUT_JIFFIES (HZ / 2) +#define MAX_DPCD_TRANSACTION_BYTES 16 + struct msm_dp_event { u32 event_id; u32 data; @@ -1689,6 +1691,16 @@ int msm_dp_modeset_init(struct msm_dp *msm_dp_display, struct drm_device *dev, return 0; } +int msm_dp_mst_register(struct msm_dp *dp) +{ + struct msm_dp_display_private *dp_display; + + dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); + + return msm_dp_mst_init(dp, dp_display->max_stream, + MAX_DPCD_TRANSACTION_BYTES, dp_display->aux); +} + void msm_dp_display_atomic_prepare(struct msm_dp *dp) { int rc = 0; diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 12b50a797772f574122481cd8a1c7c88aacb8250..7ed0e25d6c2bc9e4e3d78895742226d22d103e4c 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -376,6 +376,8 @@ int msm_dp_get_mst_max_stream(const struct msm_dp *dp_display); int msm_dp_mst_bridge_init(struct msm_dp *dp_display, struct drm_encoder *encoder); +int msm_dp_mst_register(struct msm_dp *dp_display); + #else static inline int __init msm_dp_register(void) { @@ -397,6 +399,11 @@ static inline int msm_dp_get_mst_max_stream(struct msm_dp *dp_display) return -EINVAL; } +static inline int msm_dp_mst_register(struct msm_dp *dp_display) +{ + return -EINVAL; +} + int msm_dp_mst_bridge_init(struct msm_dp *dp_display, struct drm_encoder *encoder) { return -EINVAL;
For each MST capable DP controller, initialize a dp_mst module to manage its DP MST operations. The DP MST module for each controller is the central entity to manage its topology related operations as well as interfacing with the rest of the DP driver. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 6 ++++++ drivers/gpu/drm/msm/dp/dp_display.c | 12 ++++++++++++ drivers/gpu/drm/msm/msm_drv.h | 7 +++++++ 3 files changed, 25 insertions(+)