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Fri, 6 Dec 2024 07:21:21 GMT Received: from hu-mdalam-blr.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 5 Dec 2024 23:21:17 -0800 From: Md Sadre Alam To: , , , , , , , CC: , , Subject: [PATCH 1/3] arm64: dts: qcom: ipq5424: Add TRNG node Date: Fri, 6 Dec 2024 12:50:55 +0530 Message-ID: <20241206072057.1508459-2-quic_mdalam@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241206072057.1508459-1-quic_mdalam@quicinc.com> References: <20241206072057.1508459-1-quic_mdalam@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: E42iTkZ-N2KC7Cm5C6fFkC6SPutf7ilu X-Proofpoint-GUID: E42iTkZ-N2KC7Cm5C6fFkC6SPutf7ilu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 bulkscore=0 phishscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 mlxscore=0 mlxlogscore=889 priorityscore=1501 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412060051 add TRNG (Truly Random Number Generator) node for ipq5424 Signed-off-by: Md Sadre Alam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq5424.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi index 5e219f900412..c51879daa68c 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -145,6 +145,13 @@ soc@0 { #size-cells = <2>; ranges = <0 0 0 0 0x10 0>; + rng: rng@4c3000 { + compatible = "qcom,trng"; + reg = <0 0x004c3000 0 0x1000>; + clocks = <&gcc GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,ipq5424-tlmm"; reg = <0 0x01000000 0 0x300000>;