| Message ID | 20241219-correct_gpio_ranges-v2-4-19af8588dbd0@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Correct the number of GPIOs in gpio-ranges for QCS615 and QCS8300 | expand |
On 19.12.2024 8:59 AM, Lijuan Gao wrote: > Correct the ngpios entry to account for the UFS_RESET pin, which is > expected to be wired to the reset pin of the primary UFS memory and is > exported as GPIOs in addition to the real GPIOs, allowing the UFS driver > to toggle it. > > Fixes: 0c4cd2cc87c8 ("pinctrl: qcom: add the tlmm driver for QCS8300 platforms") > Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
diff --git a/drivers/pinctrl/qcom/pinctrl-qcs8300.c b/drivers/pinctrl/qcom/pinctrl-qcs8300.c index ba6de944a859..5f5f7c4ac644 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcs8300.c +++ b/drivers/pinctrl/qcom/pinctrl-qcs8300.c @@ -1204,7 +1204,7 @@ static const struct msm_pinctrl_soc_data qcs8300_pinctrl = { .nfunctions = ARRAY_SIZE(qcs8300_functions), .groups = qcs8300_groups, .ngroups = ARRAY_SIZE(qcs8300_groups), - .ngpios = 133, + .ngpios = 134, .wakeirq_map = qcs8300_pdc_map, .nwakeirq_map = ARRAY_SIZE(qcs8300_pdc_map), .egpio_func = 11,
Correct the ngpios entry to account for the UFS_RESET pin, which is expected to be wired to the reset pin of the primary UFS memory and is exported as GPIOs in addition to the real GPIOs, allowing the UFS driver to toggle it. Fixes: 0c4cd2cc87c8 ("pinctrl: qcom: add the tlmm driver for QCS8300 platforms") Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> --- drivers/pinctrl/qcom/pinctrl-qcs8300.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)