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Sun, 22 Dec 2024 12:14:13 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 22 Dec 2024 22:14:05 +0200 Subject: [PATCH v5 02/11] drm/msm/dp: read hw revision only once Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241222-fd-dp-audio-fixup-v5-2-370f09492cf6@linaro.org> References: <20241222-fd-dp-audio-fixup-v5-0-370f09492cf6@linaro.org> In-Reply-To: <20241222-fd-dp-audio-fixup-v5-0-370f09492cf6@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Paloma Arellano Cc: Douglas Anderson , Stephen Boyd , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4182; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=ZQK3De9spKq2bOT0Hl1HvbbvggyGKbTI3+3PIdSsFLY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnaHMN64yI3FonnpxfQhjZ/o9sM5NujZ5qSSL8K l2ZABxBqVOJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ2hzDQAKCRCLPIo+Aiko 1bwRB/9ZnCYL7Vg7RlwIqjQ2vzjSxspFT7p9mRiAqtYAz/4CsH/oX15+mFkWFAdKfLFybiqtTc9 QDx39d/QmAb4GH5bq73+Iq73gNQPO7LG5bXvgeF6Kipx3/PAi/kwj02fr2ElA0CZ/EIfRDhd3gU YwDn28J8pfBBryxNy4crlFebxSZqpJ3MjMWcwW44czxBEi66vNl/uVZS3T0gqqBlD/JG8Wol6r7 lyhPa9+88jCt6j8Rtqmj2R+1R8xZLSVCdIf7rX8e/hjhlf2+7R9S3n3LF+pSbGWEZJNz2LJu7r4 8IxLVDfULxJ4WO033BQTMg3WYqeBGKVrCbW81OZRX8toH6RB X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is little point in rereading DP controller revision over and over again. Read it once, after the first software reset. Reviewed-by: Stephen Boyd Tested-by: Stephen Boyd # sc7180-trogdor Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_catalog.c | 29 ++++++++--------------------- drivers/gpu/drm/msm/dp/dp_catalog.h | 2 +- 2 files changed, 9 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index 4f80eceb6ae19f542110d7379007f57c2ac16a8a..23f9fcb75123a58b3a4b69d3dad0598135108eec 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -414,14 +414,13 @@ void msm_dp_catalog_ctrl_config_misc(struct msm_dp_catalog *msm_dp_catalog, void msm_dp_catalog_setup_peripheral_flush(struct msm_dp_catalog *msm_dp_catalog) { - u32 mainlink_ctrl, hw_revision; + u32 mainlink_ctrl; struct msm_dp_catalog_private *catalog = container_of(msm_dp_catalog, struct msm_dp_catalog_private, msm_dp_catalog); mainlink_ctrl = msm_dp_read_link(catalog, REG_DP_MAINLINK_CTRL); - hw_revision = msm_dp_catalog_hw_revision(msm_dp_catalog); - if (hw_revision >= DP_HW_VERSION_1_2) + if (msm_dp_catalog->hw_revision >= DP_HW_VERSION_1_2) mainlink_ctrl |= DP_MAINLINK_FLUSH_MODE_SDE_PERIPH_UPDATE; else mainlink_ctrl |= DP_MAINLINK_FLUSH_MODE_UPDATE_SDP; @@ -514,22 +513,6 @@ int msm_dp_catalog_ctrl_set_pattern_state_bit(struct msm_dp_catalog *msm_dp_cata return 0; } -/** - * msm_dp_catalog_hw_revision() - retrieve DP hw revision - * - * @msm_dp_catalog: DP catalog structure - * - * Return: DP controller hw revision - * - */ -u32 msm_dp_catalog_hw_revision(const struct msm_dp_catalog *msm_dp_catalog) -{ - const struct msm_dp_catalog_private *catalog = container_of(msm_dp_catalog, - struct msm_dp_catalog_private, msm_dp_catalog); - - return msm_dp_read_ahb(catalog, REG_DP_HW_VERSION); -} - /** * msm_dp_catalog_ctrl_reset() - reset DP controller * @@ -556,6 +539,9 @@ void msm_dp_catalog_ctrl_reset(struct msm_dp_catalog *msm_dp_catalog) sw_reset &= ~DP_SW_RESET; msm_dp_write_ahb(catalog, REG_DP_SW_RESET, sw_reset); + + if (!msm_dp_catalog->hw_revision) + msm_dp_catalog->hw_revision = msm_dp_read_ahb(catalog, REG_DP_HW_VERSION); } bool msm_dp_catalog_ctrl_mainlink_ready(struct msm_dp_catalog *msm_dp_catalog) @@ -895,9 +881,10 @@ static void msm_dp_catalog_panel_update_sdp(struct msm_dp_catalog *msm_dp_catalo u32 hw_revision; catalog = container_of(msm_dp_catalog, struct msm_dp_catalog_private, msm_dp_catalog); + hw_revision = msm_dp_catalog->hw_revision; - hw_revision = msm_dp_catalog_hw_revision(msm_dp_catalog); - if (hw_revision < DP_HW_VERSION_1_2 && hw_revision >= DP_HW_VERSION_1_0) { + if (hw_revision < DP_HW_VERSION_1_2 && + hw_revision >= DP_HW_VERSION_1_0) { msm_dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x01); msm_dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x00); } diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h index 08bb42e91b779633875dbeb4130bc55a6571cfb1..379fa4fef9ceb63b20c4aec2fca1e09003dc738b 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -33,6 +33,7 @@ struct msm_dp_catalog { bool wide_bus_en; + u32 hw_revision; }; /* Debug module */ @@ -61,7 +62,6 @@ void msm_dp_catalog_ctrl_config_misc(struct msm_dp_catalog *msm_dp_catalog, u32 void msm_dp_catalog_ctrl_config_msa(struct msm_dp_catalog *msm_dp_catalog, u32 rate, u32 stream_rate_khz, bool is_ycbcr_420); int msm_dp_catalog_ctrl_set_pattern_state_bit(struct msm_dp_catalog *msm_dp_catalog, u32 pattern); -u32 msm_dp_catalog_hw_revision(const struct msm_dp_catalog *msm_dp_catalog); void msm_dp_catalog_ctrl_reset(struct msm_dp_catalog *msm_dp_catalog); bool msm_dp_catalog_ctrl_mainlink_ready(struct msm_dp_catalog *msm_dp_catalog); void msm_dp_catalog_ctrl_enable_irq(struct msm_dp_catalog *msm_dp_catalog, bool enable);