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[1/4] dt-bindings: interconnect: OSM L3: Document sm8650 OSM L3 compatible

Message ID 20250110-topic-sm8650-ddr-bw-scaling-v1-1-041d836b084c@linaro.org (mailing list archive)
State New
Headers show
Series arm64: qcom: sm8650: add DDR, LLCC & L3 CPU bandwidth scaling | expand

Commit Message

Neil Armstrong Jan. 10, 2025, 3:21 p.m. UTC 
Document the OSM L3 found in the Qualcomm SM8650 platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 +
 1 file changed, 1 insertion(+)

Comments

Krzysztof Kozlowski Jan. 11, 2025, 10:53 a.m. UTC | #1 
On Fri, Jan 10, 2025 at 04:21:18PM +0100, Neil Armstrong wrote:
> Document the OSM L3 found in the Qualcomm SM8650 platform.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
index 21dae0b92819622fa56b0a46beaeb6f585cdec35..4ac0863205b3b30cdfcde6fe1bf5abc3b122a2f5 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
@@ -33,6 +33,7 @@  properties:
               - qcom,sm6375-cpucp-l3
               - qcom,sm8250-epss-l3
               - qcom,sm8350-epss-l3
+              - qcom,sm8650-epss-l3
           - const: qcom,epss-l3
 
   reg: