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Wed, 15 Jan 2025 05:44:08 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-437c7540ae7sm23454655e9.33.2025.01.15.05.44.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 05:44:08 -0800 (PST) From: Neil Armstrong Date: Wed, 15 Jan 2025 14:44:02 +0100 Subject: [PATCH 10/10] arm64: dts: qcom: sm8650: add UFS OPP table instead of freq-table-hz property Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250115-topic-sm8x50-upstream-dt-icc-update-v1-10-eaa8b10e2af7@linaro.org> References: <20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org> In-Reply-To: <20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2455; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=xPels4/tn8OmIiuBZUI8AqxVcLWOtvfHzPNL/GpLLcM=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnh7ufkvSEN5CLjvs/+VoiijimJfJw9I/s77HHp8lE +vGV33CJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ4e7nwAKCRB33NvayMhJ0TNhD/ 4q967LN5TMSYvg+rEUYDAvJcUHaLzVb/nEuW/c7HcqFFSQW/MBh6ur/TijfCFsmICUmGzMlmRMcDsf htJ2Lk6hQwrBvL1t1MRiAKaNs+yL3V7FyYZKy1rxemZ5Q2ENKH+qKYlHiFRpLLXL06JjF5crswnCiA 93CvTqSKdfgYYxCuEkXBKALG+Q7SIwmR9pu2sjCtVqNe8E+t6oEm2/7lD/5iN1Eovge9og2beFD/Yt Vs1Id5a7TlCBKcwFMEWWRMiraZvu5mAbCQWW0nos/3K0qaCsdKiPFQ2m7XtMnoiIg9/iLqJD3hbbgg cQQ+Ba6a9Sl0/MF3Y4FEV+vDcUF/CV/Z/dh8xTdDBLaO8qk3Ww8trLfpNFiMJNz6yXMetHsWOiJChQ I8Wgc0eIuBBtqoMLFIQFmi563JlpTwqDag6b/ae45ArrgwLvKPLGE9ZpuU6qCvocUGKUyUP6bPd3lE 4UEmPk0OSyrDGmlGHUzie2mgqhOIW3k88KVlECAT7QH9hgV73H8L+Rajg3linxks/TeYChYC67KO/m pFNBswkW+YEA0xpUiUR/XpBJDndYAyQv6mE+Ua2VPg+tGEIeB8UoYgPFwpxng37JMt2qm/OadyttYh wKeKn+pA8BuYJIzi+y+kZADV5ZxL5PzjWE+OdfFmEdUQnMAhPawwpk7NfAlQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Swich to an OPP table for the UFS frequency scaling instead of the deprecated freq-table-hz property. The Operating Point table will also provide the associated power domain level. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 50 ++++++++++++++++++++++++++++++------ 1 file changed, 42 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 82be3f9051705507767023d7e195489852223ce3..483ae63e6032823e8cc13e8aeb6db70e3948f02d 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2900,14 +2900,6 @@ ufs_mem_hc: ufshc@1d84000 { "tx_lane0_sync_clk", "rx_lane0_sync_clk", "rx_lane1_sync_clk"; - freq-table-hz = <100000000 403000000>, - <0 0>, - <0 0>, - <100000000 403000000>, - <100000000 403000000>, - <0 0>, - <0 0>, - <0 0>; resets = <&gcc GCC_UFS_PHY_BCR>; reset-names = "rst"; @@ -2922,6 +2914,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, power-domains = <&gcc UFS_PHY_GDSC>; required-opps = <&rpmhpd_opp_nom>; + operating-points-v2 = <&ufs_opp_table>; + iommus = <&apps_smmu 0x60 0>; lanes-per-direction = <2>; @@ -2933,6 +2927,46 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, #reset-cells = <1>; status = "disabled"; + + ufs_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <100000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-201500000 { + opp-hz = /bits/ 64 <201500000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <201500000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-403000000 { + opp-hz = /bits/ 64 <403000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <403000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; }; ice: crypto@1d88000 {