From patchwork Wed Jan 15 10:30:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Md Sadre Alam X-Patchwork-Id: 13940261 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6E201E98F8; Wed, 15 Jan 2025 10:31:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736937094; cv=none; b=tTcvFFkRkdLi+Gnrq/aMmvSmAwSckZ0njuX34AH2xJMsXVZDHL4BMfQpmjeK4LS9H8RpbsoHgX2hb14uQAuflOvGZPwoSPQfbrWFk+ghl8+wnmgmWj9MaxiPXhTw13Y+vmyVgAWjIXRJhr6+i+Uyl3u/6xeZCZ4yY3fkaFHVXSs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736937094; c=relaxed/simple; bh=xR7C9JI7/QprVNUv4swUps3CfAjUmG2LBI+P5lZjtd4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=uz+2vbuv4D4SxvEVqxaWM8M5gF17eoDGDyovzrvflPAnlKwWi/oIrr1fVFoSzHp5AsCM8lG+Jmd9cc+7zwwYI1JvNgHGxSgJdn3bm5Vg/WXjqxqz84QBbsQxgqBkU9i21eObysKkk+9Wnl6x35xT+yNkJ61ed/AGdl+4zXCaFjY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=ZFUwW6mw; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="ZFUwW6mw" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 50F7FxbB030794; Wed, 15 Jan 2025 10:31:23 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= jNoy6ROR/9trQmHesqNNT+7bjWtxAjZHHMDYyYJGxKc=; b=ZFUwW6mwc5ZS6HcO Pm6TJWlmNdBVl0w/1eEXeaJfOAg3RKyJBm+r7bZAgnqZzN/fhkU6hXCjEim9RZ2L y9GptP8lk0QU/W3klHbEnuLU6XJfSODsze6W0hYepdbBIl8D5j0bOyWQmCYBAk2f ylrlo5nZgBUKfDUEzbL4X9ujNnXwuK3/OT0IxXWFS3pyiOlWfWsZsfVoqAa3Iwl3 HvYJTgHHfZVHK12RoE5jXMhk5OCtYmlUdVLgyo21McsGOYcb5MLAu4udn4FlK46l /O++pvRkboCvaVpj7atECte50e6NX9LTucsaNpDgc61dYCRi3xrvScHMnI0m0tVa Q3LpeQ== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4468fs0fhd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Jan 2025 10:31:23 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50FAVMjB019935 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Jan 2025 10:31:22 GMT Received: from hu-mdalam-blr.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 15 Jan 2025 02:31:17 -0800 From: Md Sadre Alam To: , , , , , , , , , , , , CC: , , , Subject: [PATCH v6 10/12] crypto: qce - Add support for lock/unlock in skcipher Date: Wed, 15 Jan 2025 16:00:02 +0530 Message-ID: <20250115103004.3350561-11-quic_mdalam@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250115103004.3350561-1-quic_mdalam@quicinc.com> References: <20250115103004.3350561-1-quic_mdalam@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Rc0LSJSZJwZ7plp3z668E0qIrheKa-Bu X-Proofpoint-ORIG-GUID: Rc0LSJSZJwZ7plp3z668E0qIrheKa-Bu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-15_04,2025-01-15_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 mlxlogscore=999 impostorscore=0 priorityscore=1501 mlxscore=0 spamscore=0 phishscore=0 clxscore=1015 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501150079 Add support for lock/unlock on bam pipe in skcipher. If multiple EE's(Execution Environment) try to access the same crypto engine then before accessing the crypto engine EE's has to lock the bam pipe and then submit the request to crypto engine. Once request done then EE's has to unlock the bam pipe so that others EE's can access the crypto engine. Signed-off-by: Md Sadre Alam --- Change in [v6] * No change Change in [v5] * No change Change in [v4] * No change Change in [v3] * Move qce_bam_release_lock() after qca_dma_terminate_all() api Change in [v2] * Added qce_bam_acquire_lock() and qce_bam_release_lock() api for skcipher Change in [v1] * This patch was not included in [v1] drivers/crypto/qce/skcipher.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/crypto/qce/skcipher.c b/drivers/crypto/qce/skcipher.c index ffb334eb5b34..01b7d6125962 100644 --- a/drivers/crypto/qce/skcipher.c +++ b/drivers/crypto/qce/skcipher.c @@ -52,6 +52,8 @@ static void qce_skcipher_done(void *data) sg_free_table(&rctx->dst_tbl); + qce_bam_release_lock(qce); + error = qce_check_status(qce, &status); if (error < 0) dev_dbg(qce->dev, "skcipher operation error (%x)\n", status); @@ -82,6 +84,8 @@ qce_skcipher_async_req_handle(struct crypto_async_request *async_req) dir_src = diff_dst ? DMA_TO_DEVICE : DMA_BIDIRECTIONAL; dir_dst = diff_dst ? DMA_FROM_DEVICE : DMA_BIDIRECTIONAL; + qce_bam_acquire_lock(qce); + rctx->src_nents = sg_nents_for_len(req->src, req->cryptlen); if (diff_dst) rctx->dst_nents = sg_nents_for_len(req->dst, req->cryptlen);